10. Clocks, Resets and Power-up Options > Power-up Options
214
Tsi578 User Manual
June 6, 2016
Integrated Device Technology
www.idt.com
10.3.2
Default Port Speed
When the SP_IO_SPEED[1:0] pins are left unconnected in the board, the device’s internal pull-ups
configure the Tsi578 to 3.125 Gbit/s (default). The speed can be overridden by the IO_SPEED field in
the
“SRIO MAC x Digital Loopback and Clock Selection Register” on page 377
.
10.3.3
Port Power-up and Power-down
The power-up and power-down is overridden by the PWDN_X1 and PWDN_X4 fields in the
MAC x Digital Loopback and Clock Selection Register” on page 377
.
10.3.4
Port Width Override
Initial port width of the port is set by SPx_MODESEL pins at power-up. After power-up the
SPx_MODESEL signals are ignored and the port width setting can be overridden by the
OVER_PWIDTH field in the
“RapidIO Serial Port x Control CSR” on page 281
I2C_MA
I
2
C Multibyte Address
When driven high, I
2
C module expects multi-byte peripheral addressing;
otherwise, when driven low, single-byte peripheral address is assumed.
I2C_SA[1,0]
I
2
C Slave Address pins.
The values on these two pins represent the values for the lower 2 bits of
the 7-bit address of Tsi578 when acting as an I
2
C slave.
I2C_SEL
I
2
C Pin Select. Together with the I2C_SA[1,0] pins, Tsi578 determines
the lower 2 bits of the 7-bit address of the EEPROM address it boots
from.
When asserted, the I2C_SA[1,0] values are also used as the lower 2 bits
of the EEPROM address.
When de-asserted, the I2C_SA[1,0] pins are ignored and the lower 2 bits
of the EEPROM address are default to 00.
I2C_DISABLE
Disable I
2
C register loading after reset. When asserted, the Tsi578 does
not attempt to load register values from I
2
C.
0 = Enable I
2
C register loading
1 = Disable I
2
C register loading
Must remain stable for 10 P_CLK cycles after HARD_RST_b is
de-asserted in order to be sampled correctly.
For alternative P_CLK
values, refer to
This signal is ignored after reset.
It is strongly recommended to drive the SP_IO_SPEED[1:0] with known values instead of
relying on the internal default values in order to set the default speeds of the device.
Table 28: Power-Up Options Signals
Pin Name
Description
Содержание Tsi578
Страница 1: ...IDT Tsi578 Serial RapidIO Switch User Manual June 6 2016 Titl ...
Страница 20: ...About this Document 20 Tsi578 User Manual June 6 2016 Integrated Device Technology www idt com ...
Страница 102: ...4 Internal Switching Fabric Packet Queuing 102 Tsi578 User Manual June 6 2016 Integrated Device Technology www idt com ...
Страница 228: ...11 Signals Pinlist and Ballmap 228 Tsi578 User Manual June 6 2016 Integrated Device Technology www idt com ...
Страница 504: ...B Clocking P_CLK Programming 504 Tsi578 User Manual June 6 2016 Integrated Device Technology www idt com ...
Страница 526: ...Index 526 Tsi578 User Manual June 6 2016 Integrated Device Technology www idt com ...