ICS 8099, Инструкция по эксплуатации

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3-6
3
*ESE 64 ‘enables ESR bits 6
*SRE 32 ‘enables StatusByte bit 5
*ESR?
‘reads ESR Register bits
E? ‘reads Modbus Error Register
3.3.4 Questionable Registers and Digital Inputs
The Questionable Registers lets the user read bits that report Modbus CRC
errors, Exception message types or a timeout (no response message received).
Bit alignments are shown in Figure 3-1. The Questionable Transition Register
filters the inputs and passes only the enabled state changes to the Questionable
Event Register. The Questionable Event Register bits becomes true (1) when
the positive transition bit is enabled and the associated condition register bit
makes a 0 to 1 transition. When both transitions are selected for the same bit, the
corresponding Questionable Event Register bit sets whenever the digital input
changes state. The Questionable Event Register is cleared when it is read.
The Questionable Registers are queried with the SCPI STATUS branch com-
mands.
The 8099 can be set to monitor the bits in the Questionable Register and gener-
ate a Service Request (SRQ) when they change state. The following example
sets the Questionable Event register to monitor the CRC and Timeout bits by
capturing a positive transition on bits 12 and 13. The decimal value for bit 12
is 4096 and the decimal value for bit 13 is 8192.
STAT:QUES:PTR 12298 ‘enables bits 12 and 13 to set
on a positive transition
Because summing large decimal values is confusing, it is better to use HEX
values that are easier to write. i.e.
STAT:QUES:PTR #h3000 ‘same as 12298 decimal
The Questionable Enable Register enables set Event bits to be included in the
summary output to the Status Byte Register. The following example enables
bits 12 and 13:
STAT:QUES:ENAB #h3000 ‘enables Event bits 12 and 13
Note that the Questionable Event Register has to be cleared after an Service
Request is generated either by reading the register or with the *CLS command.