32
4.6 Advanced
Chipset
Features
CMOS Setup Utility - Copyright ( C ) 1984-2001 Award Software
Advanced Chipset Features
DRAM Timing Selectable SPD
CAS Latency Time 3
Active to Precharge Delay 6
DRAM RAS# TO CAS# Delay 3
DRAM RAS# Precharge 3
Memory Frequency For Auto
Dram Read Thermal Mgmt Disabled
System BIOS Cacheable
Disabled
Video BIOS Cacheable
Disabled
Video RAM Cacheable Disabled
Memory Hole At 15M-16M Disabled
Delayed Transaction Enabled
AGP Aperture Size 64
Flash BIOS
Disabled
Power-supply Type AT
Item Help
_______________________
Menu Level
↑↓←→
Move Enter: Select +/-/PU/PD: Value F10:Save ESC: Exit F1:General Help
F5:Previous Values F6:Fail-safe defaults F7:Optimized Defaults
This section allows you to configure the system based on the specific features of the
installed chipset. This chipset manages bus speeds and access to system memory
resources, such as DRAM and the external cache. It also coordinates
communications between the conventional ISA bus and the PCI bus. It must be
stated that these items should never need to be altered. The default settings are
designed for the best operating conditions for your system.
DRAM Timing Selectable
This item allows you to select the value in this field, depending on whether the
board has paged DRAMs or EDO (extended data output) DRAMs.
Options: SPD, Manual.
CAS Latency Time
When synchronous DRAM is installed, the number of clock cycles of CAS latency
depends on the DRAM timing. Do not set this field different from the default
value specified by the system designer.
Options: 2, 3.
Memory Frequency For
Auto: Auto-detection based on hardware.
PC100/133: 100MHz/133MHz