5137ch02.fm
Draft Document for Review October 14, 2014 10:19 am
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IBM Power Systems E870 and E880 Technical Overview and Introduction
2.4.6 Software licensing and CoD
For software licensing considerations with the various CoD offerings, see the most recent
revision of the Power Systems Capacity on Demand User’s Guide:
http://www.ibm.com/systems/power/hardware/cod
2.5 System bus
This section provides additional information related to the internal buses.
2.5.1 PCI Express Gen3
The internal I/O subsystem on the Power E870 and Power E880 is connected to the PCIe
Controllers on a POWER8 processor in the system. Each POWER8 processor module has
two buses that have 16 PCIe lanes each (for a total of 32 PCIe lanes) running at 7.877 Gbps
full-duplex and provides 31.508 GBps of I/O connectivity to the PCIe slots. A diagram with the
connections can be seen in Figure 2-18.
Figure 2-18 System nodes PCIe slots directly attached to PCIe controllers on POWER8 chips
Besides the slots directly attached to the processors PCI Gen3 controllers, the systems also
allow for additional PCIe adapters on external PCIe Expansion Drawers and disks on external
drawers connected through PCIe SAS adapters.
Figure 2-19 on page 67 shows a diagram with the I/O connectivity options available for the
Power E870 and Power E880. The system nodes allow for eight PCIe Gen3 x16 slots.
Additional slots can be added by attaching PCIe Expansion Drawers and SAS disks can be
I/O
Back
p
lane
PCIe Gen3 x16 slot
PCIe Gen3 x16 slot
PCIe Gen3 x16 slot
PCIe Gen3 x16 slot
PCIe Gen3 x16 slot
PCIe Gen3 x16 slot
PCIe Gen3 x16 slot
PCIe Gen3 x16 slot
P8 (0)
PHB 1
PHB 0
SMP
X Bus
SM
P
A Bu
s
Memory
Controller 0
Memory
Controller 1
P8 (2)
PHB 1
PHB 0
SMP
X Bus
SM
P
A Bu
s
Memory
Controller 0
Memory
Controller 1
P8 (3)
PHB 1
PHB 0
SMP
X Bus
SM
P
A Bu
s
Memory
Controller 0
Memory
Controller 1
P8 (1)
Memory
Controller 0
Memory
Controller 1
PHB 1
PHB 0
SMP
X Bus
SM
P
A B
u
s
