Chapter 2. Architecture and technical overview
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Table 2-7 shows the CDIMM plugging order for a Power E880 with a three system nodes:
Table 2-7 Optimal CDIMM memory quad placement for three system nodes
System Node 1
Processor 0
Processor 2
Processor 3
Processor 1
Quad 1
Quad 5
Quad 2
Quad 6
Quad 3
Quad 7
Quad 4
Quad 8
1
13
2
16
3
19
4
22
System Node 2
Processor 0
Processor 2
Processor 3
Processor 1
Quad 1
Quad 5
Quad 2
Quad 6
Quad 3
Quad 7
Quad 4
Quad 8
5
14
6
17
7
20
8
23
System Node 3
Processor 0
Processor 2
Processor 3
Processor 1
Quad 1
Quad 5
Quad 2
Quad 6
Quad 3
Quad 7
Quad 4
Quad 8
9
15
10
18
11
21
12
24
Notes:
Memory quads 1-12 must be populated.
Memory quads on the same processor must be populated with CDIMMs of the same capacity.