IBM Power 750 Express, Технический обзор и введение

Страница: 60 / 204

46
IBM Power 750 and 760 Technical Overview and Introduction
Figure 2-2 processor die with key areas indicated
2.1.1 processor overview
The processor chip is fabricated with IBM 32 nm Silicon-On-Insulator (SOI)
technology using copper interconnects, and implements an on-chip L3 cache using eDRAM.
The processor chip is 567 mm
2
and has 2.1 billion components (transistors). Up
to eight processor cores are on the chip, each with 12 execution units, 256 KB of L2 cache
per core, and up to 80 MB of shared on-chip L3 cache per chip.
For memory access, the processor includes a double data rate 3 (DDR3) memory
controller with four memory channels.
Table 2-1 summarizes the technology characteristics of the processor.
Table 2-1 Summary of processor technology
Technology processor
Die size 567 mm
2
Fabrication technology 򐂰 32 nm lithography
򐂰 Copper interconnect
򐂰 Silicon-on-Insulator
򐂰 eDRAM
Processor cores 3, 4, 6, or 8