29
Plasma TV Service Manual
14/03/2005
V
SSD3
D9
P
digital ground 3 (peripheral cells)
V
SSD4
D10
P
digital ground 4 (core)
V
SSD5
D11
P
digital ground 5 (peripheral cells)
V
DDD5
D12
P
digital supply voltage 5 (peripheral cells)
TEST12
D13
I/pu
do not connect, reserved for future extensions and for testing:
scan input
HPD0
D14
I/O
LSB of host port data I/O, extended C
B
-C
R
input for
expansion port, extended C
B
-C
R
output for image port
AI44
E1
I
analog input 44
V
DDA4A
E2
P
analog supply voltage for analog inputs AI4x (3.3 V)
AI31
E3
I
analog input 31
V
SSA3
E4
P
ground for analog inputs AI3x
HPD1
E11
I/O
MSB - 6 of host port data I/O, extended C
B
-C
R
input for
expansion port, extended C
B
-C
R
output for image port
HPD3
E12
I/O
MSB - 4 of host port data I/O, extended C
B
-C
R
input for
expansion port, extended C
B
-C
R
output for image port
HPD2
E13
I/O
MSB - 5 of host port data I/O, extended C
B
-C
R
input for
expansion port, extended C
B
-C
R
output for image port
HPD4
E14
I/O
MSB - 3 of host port data I/O, extended C
B
-C
R
input for
expansion port, extended C
B
-C
R
output for image port
AI3D
F1
I/O
differential input for ADC channel 3 (pins AI31 to AI34)
AI32
F2
I
analog input 32
AI33
F3
I
analog input 33
V
DDA3
F4
P
analog supply voltage for analog inputs AI3x (3.3 V)
V
SSD6
F11
P
digital ground 6 (core)
V
DDD6
F12
P
digital supply voltage 6 (core)
HPD5
F13
I/O
MSB - 2 of host port data I/O, extended C
B
-C
R
input for
expansion port, extended C
B
-C
R
output for image port
HPD6
F14
I/O
MSB - 1 of host port data I/O, extended C
B
-C
R
input for
expansion port, extended C
B
-C
R
output for image port
AI34
G1
I
analog input 34
V
DDA3A
G2
P
analog supply voltage for analog inputs AI3x (3.3 V)
AI22
G3
I
analog input 22
AI21
G4
I
analog input 21
V
SSD7
G11
P
digital ground 7 (peripheral cells)
IPD1
G12
O
MSB - 6 of image port data output
HPD7
G13
I/O
MSB of host port data I/O, extended C
B
-C
R
R input for
expansion port, extended C
B
-C
R
output for image port
IPD0
G14
O
LSB of image port data output
AI2D
H1
I
differential input for ADC channel 2 (pins AI24 to AI21)
AI23
H2
I
analog input 23
V
SSA2
H3
P
ground for analog inputs AI2x
V
DDA2
H4
P
analog supply voltage for analog inputs AI2x
IPD2
H11
O
MSB - 5 of image port data output
V
DDD7
H12
P
digital supply voltage 7 (peripheral cells)
IPD4
H13
O
MSB - 3 of image port data output
IPD3
H14
O
MSB - 4 of image port data output
V
DDA2A
J1
P
analog supply voltage for analog inputs AI2x
AI11
J2
I
analog input 11
AI24
J3
I
analog input 24
V
SSA1
J4
P
ground for analog inputs AI1x
V
SSD8
J11
P
digital ground 8 (core)
V
DDD8
J12
P
digital supply voltage 8 (core)
IPD6
J13
O
MSB 1 of image port data output
IPD5
J14
O
MSB 2 of image port data output
AI12
K1
I
analog input 12
AI13
K2
I
analog input 13
AI1D
K3
I
differential input for ADC channel 1 (pins AI14 to AI11)
V
DDA1
K4
P
analog supply voltage for analog inputs AI1x (3.3 V)
IPD7
K11
O
MSB of image port data output
IGPH
K12
O
multi purpose horizontal reference output signal; image port
(controlled by subaddresses 84H and 85H)
IGP1
K13
O
general purpose output signal 1; image port (controlled by
subaddresses 84H and 85H)
IGPV
K14
O
multi purpose vertical reference output signal; image port
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