1-311
Figure 15. Illustration of Propagation Delay Skew – t
PSK
.
50%
1.5 V
I F
VO
50%
I F
VO
tPSK
1.5 V
Figure 13. Recommended 20 MBd HCPL-2400/30 Interface Circuit.
Applications
Figure 14. Alternative HCPL-2400/30
Interface Circuit.
Figure 16. Parallel Data Transmission Example.
Figure 17. Modulation Code Selections.
Figure 18. Typical HCPL-2400/30 Output Schematic.
DATA
t
PSK
INPUTS
CLOCK
DATA
OUTPUTS
CLOCK
t
PSK
HCPL-2400
HCPL-2400
V