3.
Repeat for Ports 1 through 3
•
Repeat step 2 for ports 1, 2, and 3.
•
Use SOUR:DIG:DATAn #Bssssssss and MEAS:DIG:DATAn?
where n = port number and ssssssss = the binary string.
•
For Port 1 Write, use Port 3 Read. For Port 2 Write, use Port 0
Read. For Port 3 Write, use Port 1 Read.
4.
Check Port 0 CTL and Port 2 FLG handshake lines
•
Send *RST to the module.
•
Send SOUR:DIG:CONT0 1 to the module.
•
Send MEAS:DIG:FLAG2? to the module.
•
Enter the response. The response should be 1.
•
Enter a Pass or Fail in Table 2-1.
•
Send SOUR:DIG:CONT0 0 to the module.
•
Send MEAS:DIG:FLAG2? to the module.
•
Enter the response. The response should be 0.
•
Enter a Pass or Fail in Table 2-1.
5.
Repeat for Ports 1, 2, and 3
•
Repeat step 4 for ports 1, 2, and 3.
•
Send SOUR:DIG:CONTn f to the module where n = port
number and f = is a binary toggle (0 and 1).
•
Send MEAS:DIG:FLAGn to the module where n = port
number.
•
For Port 1 CTL, use Port 3 FLG. For Port 2 CTL, use Port 0
FLG. For Port 3 CTL, use Port 1 FLG.
6.
Reset the module jumpers
•
Turn mainframe power OFF.
•
Remove the Test Cable from the module.
•
Remove the module from the mainframe.
•
Reset the module jumpers to the positions recorded in Step 1.
Example: Digital Test
This example performs a bit walk test of all bits on all ports and checks the
module’s ability to set and reset the handshake lines on each port.
10! RE-SAVE "DIO_TEST"
20 DISP CHR$(129)
30 ASSIGN @Dio TO 70918
40 OUTPUT @Dio;"*CLS"
50 Fail = 0
60 DIM A$[255],B$[32],Bit_walk$(7)[8]
70 DATA "00000001","00000010","00000100","00001000",
"00010000","00100000","01000000","10000000"
80 READ Bit_walk$(*)
Chapter 2
Verification Tests 21
