Chapter
3
Channel
Configuration
Data and
Status
This chapter explains how the StrainGage module and the processor communicate.
For CompactLogix configuration, please refer to
Appendix C – Setting Up HM1520 for
CompactLogix
The 8 word output image (output from the CPU to the module) contains
Information that you configure to define the way a specific channel will work.
Example – If you want to configure channel 2 on the module located in slot 4
in the SLC chassis, your address would be O:4.2.
(
o = file type : =element delimiter 4=slot .=word delimiter 2=word
)
Bit
Look Window Signal CH 1&2
O:e.0/0
Bit
Bypass Mode CH 1&2
O:e.0/1
Bit
Peak Mode CH 1&2
O:e.0/2
Bit Monitor Parts Mode Bit O:e.0/3
Bit
Alarm Reset CH 1&2
O:e.0/4
Bit
Reverse Load CH 1&2
O:e.0/5
Bit
Low Alarm Inhibit CH 1&2
O:e.0/6
Bit
Reserved O:e.0/7
Bit D0 Bit of Sample Count O:e.0/8
Bit D1 Bit of Sample Count O:e.0/9
Bit D2 Bit of Sample Count O:e.0/10
Bit D3 Bit of Sample Count O:e.0/11
Bit D4 Bit of Sample Count O:e.0/12
Bit Reserved O:e.0/13
Bit Reserved O:e.0/14
Bit Reserved O:e.0/15
Integer Scale Value O:e.1
Integer Capacity Low Alarm Setting Channel 1 O:e.2
Integer Capacity High Alarm Setting Channel 1 O:e.3
Integer Capacity Low Alarm Setting Channel 2 O:e.4
Integer Capacity High Alarm Setting Channel 2 O:e.5
Integer Trend High/Low Alarm Setting Channel 1 O:e.6
Integer Trend High/Low Alarm Setting Channel 2 O:e.7
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