IMAGETEAM™ 4X00 Series Integration Manual
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2
Working with the IT4X00 Series
Serial Command Interface (I
2
C)
The imager on the IT4X00 Series engine uses an I
2
C style interface to write and read the internal control registers.
Note: The register address pointer does NOT automatically increment the register pointer.
Each write to a sequential register requires the sub address (register address) be written with one byte of data. Each read from
a register other than the register last accessed (read or write) must have the sub address set using a “no data” write sequence
followed by the actual read. Only one byte of data should be clocked out when performing this read.
Slave Read/Write Address:Write Slave address40 Hex
Read Slave address41 Hex
Data Write Sequence
The following is an example of an I
2
C write to the IT4X00 Series sequence:
Data Read Sequence
An I
2
C read consists of a two step process. The first step is a transmit in write mode of the slave address, the sub address and
then a termination (a no data write). The first step sets the register address pointer inside the imager in preparation for the read.
The second step is the actual read of the data from the register of interest.
The following example shows the two step address write/read sequence:
Start
Slave Address (7) R/W Ack Sub Address
Ack Data
Ack Stop
Master
Slave
(bit)
(Reg Add)
0
(byte)
Master
(byte)
Slave
(bit)
Slave
(bit)
Master
(byte)
Start
Slave Address (7) R/W Ack Sub Address
Ack
Stop
Master
Slave
(bit)
(Reg Add)
0
(byte)
Master
(byte)
Slave
(bit)
Start
Slave Address (7) R/W Ack Sub Address
Ack
Stop
Master
Slave
(bit)
(Reg Add)
0
(byte)
Master
(byte)
Slave
(bit)
Start
Slave Address (7) R/W Ack
Data
Ack
Stop
Master
Slave
(bit)
1
(byte)
Master
(bit)
Slave
(byte)
Содержание IMAGETEAM IT4000HD
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