Series 8035XA Peak Power Sensors
3-2
Manual 21568, Rev. F, March 2008
INTernal trigger is slightly longer than the delay through the EXTernal trigger due to the delay of
the input differential preamp.
Figure 3-1: 8035XA High Level Block Diagram
3.2
Analog Assembly Description
Refer to Figure 3-2, the Analog Timing Diagram in Figure 3-3, and schematic diagram #21351
in Chapter 7 to follow the discussion of the Analog PC assembly circuit operation.
The rectified signal from the detector goes into the resistors R1 or R2 (TP1 and TP2). The
signal sees 2 k
Ω
to ground from either input (the negative input sees 2 k
Ω
to a virtual ground
inside R100). R3 helps to balance the input bias current. U1 and U2 delay the signal so the
trigger output and video output may be viewed close together. U4 and U5 are buffers for the
delay lines (TP3).
Содержание 80350A
Страница 4: ......
Страница 10: ...Series 8035XA Peak Power Sensors vi Manual 21568 Rev F March 2008 ...
Страница 13: ...Manual 21568 Rev F March 2008 ...
Страница 16: ...Series 8035XA Peak Power Sensors xii Manual 21568 Rev F March 2008 ...
Страница 17: ...Manual 21568 Rev F March 2008 ...
Страница 18: ...Series 8035XA Peak Power Sensors xiv Manual 21568 Rev F March 2008 ...
Страница 24: ...Series 8035XA Peak Power Sensors 1 6 Manual 21568 Rev F March 2008 ...
Страница 49: ...Figure 3 5 Digital Timing Diagram INT EXT Trig Mode Theory of Operation Manual 21568 Rev F March 2008 ...
Страница 90: ...Series 8035XA Peak Power Sensors 6 22 Manual 21568 Rev F March 2008 ...
Страница 92: ......
Страница 93: ......
Страница 94: ......
Страница 95: ......
Страница 96: ......
Страница 97: ......
Страница 98: ......
Страница 99: ......
Страница 100: ......
Страница 101: ......
Страница 102: ......
Страница 103: ......
Страница 104: ......
Страница 105: ......
Страница 106: ......
Страница 107: ......