C2K User’s Guide
4-2
Functional Blocks
NOTE:
Some operating systems or environments, such as Linux, require the ability to identify
the flash ROM device during the boot process. This requires writing to the command interface to
retrieve the device ID. If the Permanent Write Protect, External Write-Protect, On-board
Write-Protect, or Device Write-Protect functions are active, the device ID cannot be retrieved.
The FLASH_SIZE bits (bits 9, 8) in the FPGA Status Register (
see “Status Register” on
page 5-8
) provide the flash ROM size, which a custom OS can use to determine the correct device
ID.
Permanent Write-Protect
The C2K includes a jumper-resistor site to permanently write-protect all flash ROM devices. If
the resistor is installed, all flash memory write and erase operations are permanently disabled. The
resistor is typically unpopulated.
NOTE:
This resistor option is configured during the manufacturing process on a special-order
basis. This is not a user-configurable option.
External Write-Protect
The C2K provides a ROM_WP# pin at the backplane (cPCI_J5 A8) to allow an external
mechanism to enable global write-protection.
If the ROM_WP# signal is asserted (active low), all write/erase functions are disabled.
If the ROM_WP# signal is de-asserted, all write/erase functions are enabled.
NOTE:
GEIP offers an optional C2K-TM companion board that provides a ROM_WP#
header/jumper for asserting the backplane ROM_WP# signal.
On-board Write-Protect
The C2K provides an on-board FLASH_WP# header/jumper site (P6) for manually asserting the
ROM_WP# signal to enable global flash write-protection (
see “FLASH_WP# (P6)” on page 2-2
).
If the ROM_WP# signal is asserted (active low), all write/erase functions are disabled.
If the ROM_WP# signal is de-asserted, all write/erase functions are enabled.
Device Write-Protect
A device driver embedded in firmware and the FPGA Control Register bit—ROM_WP (bit 1)
(
see “Control Register” on page 5-9
) provide an internal mechanism that write-protects the flash
ROM during hardware reset. The ROM_WP bit is forced to set (write-protect enabled) during
hardware reset, to prevent inadvertent write accesses to the flash ROM devices until after BSP
firmware has initialized the board and started OS operation. Firmware must clear this bit before
performing any write or erase operations to the associated flash ROM.
Boot Area Write-Protect
The FPGA Control Register bit—BOOT_AREA_WP (bit 0) (
see “Control Register” on
page 5-9
) enables write-protection for the flash ROM emergency boot area, at and above the
upper 8MB of flash memory, to protect emergency boot code.
If the BOOT_AREA_WP bit (bit 0) is set (1), the boot area of Flash ROM is write-protected.
If the BOOT_AREA_WP bit (bit 0) is cleared (0), the boot area is not write-protected.
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