GE Multilin
239 Motor Protection Relay
7-11
7 COMMUNICATIONS
7 COMMUNICATIONS
7
7.15 ERROR RESPONSES
When a 239 detects an error other than a CRC error, a response will be sent to the master. The
MSbit of the FUNCTION CODE byte will be set to 1 (i.e. the function code sent from the slave will be
equal to the function code sent from the master plus 128). The following byte will be an exception
code indicating the type of error that occurred.
Transmissions received from the master with CRC errors will be ignored by the 239.
The slave response to an error (other than CRC error) will be:
SLAVE ADDRESS
- 1 byte
FUNCTION CODE
- 1 byte (with MSbit set to 1)
EXCEPTION CODE - 1 byte
CRC
- 2 bytes
The 239 implements the following exception response codes.
01 - ILLEGAL FUNCTION
The function code transmitted is not one of the functions supported by the 239.
02 - ILLEGAL DATA ADDRESS
The address referenced in the data field transmitted by the master is not an allowable address for the
239.
03 - ILLEGAL DATA VALUE
The value referenced in the data field transmitted by the master is not within range for the selected
data address.
7.16 MEMORY MAP INFORMATION
The data stored in the 239 is grouped as Setpoints and Actual Values. Setpoints can be read and
written by a master computer. Actual Values can be read only. All Setpoints and Actual Values are
stored as two byte values. That is, each register address is the address of a two byte value.
Addresses are listed in hexadecimal. Data values (Setpoint ranges, increments, factory values) are
in decimal.
7.17 USER DEFINABLE MEMORY MAP
The 239 contains a User Definable area in the memory map. This area allows remapping of the
addresses of all Actual Values and Setpoints registers. The User Definable area has two sections:
1. A Register Index area (memory map addresses 0180H-01F7H) that contains 120 Actual Values
or Setpoints register addresses.
2. A Register area (memory map addresses 0100H-0177H) that contains the data at the addresses
in the Register Index.
Register data that is separated in the rest of the memory map may be remapped to adjacent register
addresses in the User Definable Registers area. This is accomplished by writing to register
addresses in the User Definable Register Index area. This allows for improved throughput of data
and can eliminate the need for multiple read command sequences.
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