Gan Systems GS66502B-EVBDB, Руководство пользователя

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
Bipolar gate drive bias with +6V and -3V for turning off is chosen for this design for more robust
gate drive and better noise immunity.

5V-9V isolated DC/DC converters are used for gate drive. 9V is then splited into +6V and -3V bias
by using 6V Zener diode

By default gate drive supply input VDRV is tied to VCC +5V via 0Ω jumper (FB1). Remove FB1 if
separate gate drive input voltage is to be used.

Silab SI8271-GB-IS (3V UVLO) or SI8271–AB-IS (5V UVLO) isolated gate driver can be used for
this design. Both drivers are compatible with 6V/-3V gate drive and has CMTI dv/dt immunity
up to 200V/ns. It has separated source and sink drive outputs which eliminates the need for
additional diode.

GaN E-HEMT switching speed and slew rate can be directly controlled by the gate resistors. By
default the turn-on Rgate (R6/R12) is 10Ω and Rg_off (R7/R14) is 2Ω. User can adjust the values
of gate resistors to fine tune the turn-on and off speed.

FB1/FB2 are footprints for optional ferrite bead. By default they are populated with 0Ω jumpers.
If gate oscillation is observed, it is recommended to replace them with ferrite bead with Z=10-
20
Ω @100MHz.
RS1/CS1 and RS2/CS2 are place holders to allow user to experiement with RC snubber circuit (not
installed). At high frequency operation the power dissipation for RS1/RS2 needs to be closely watched
and CS1/CS2 should be sized correctly. It is recommended to start with 33-47pF and 10-20
Ω
.
PS2
PES1-S5-S9-M
GND
1
VIN
2
+VO
5
0V
4
NC
8
0V
VDRV
C14
4.7uF
C0805
VDDL_+6V
C15
4.7uF
C0805
GNDL
C16
4.7uF
C0805
R9
3.3K
LED2
LED-0603
U4
SI8271GB-IS
VI
1
VDDI
2
GNDI
3
EN
4
GNDA
5
VO-
6
VO+
7
VDD
8
PWML
DZ2
6.2V
SOD323-AC
A
C
R16
1K
VEEL
GNDL
C21
4.7uF
C0805
GNDL
C22
1uF
GNDL
VEEL
JP1
CON-JMP-CSHUNT
R10
3.3K
R11
10R
PWML_IN
PGND
Q2S
Q2A
GS66508T
1
2
4
3
Q2B
GS66516T
1
2
4
3
ENABLE
Q2G2
R13
3.3K
Q2G
FB3
0R
R12
10R
R14
2R
Q2_GOUT Q2_VO+
RS2
10R
R1206
Q2_VO-
C17
1uF
CS2
200p
C1206
DNP
DNP
VDDL_+6V
C18
1uF
0V
VCC_+5V