MCF5441X Tower Module Hardware Specification
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Pi
n
Function
Pi
n
Function
1
No Connect
2
No Connect
3
TXD
4
CTS
5
RXD
6
RTS
7
No Connect
8
No Connect
9
GND
10
3.3V
Table 6 - J1 & J3
4.6
SDRAM Interface
The MCF5441x is capable of supporting 256MB DDR2-500 1.8V SDRAM at 250MHz SDRAM Clock. To
reduce cost, the TWR-M54418 uses an 8-bit memory bus to interface to 128MB Micron MT47H128M8
DDR2 SDRAM.
4.7
NAND Flash Memory Interfaces
The TWR-M54418 uses a 16-bit 2Gbit 48 pin TSOP NAND Flash device (MT29F2G16A). The NAND Flash
device may uses up to 256MB (2048 blocks at 64 pages per block). The first four pages of block 0 may
use for boot code with an 8-bit bus interface. The NAND signals are shared with FlexBus signals. Pin
Assignments must be set correctly for access to work properly for each Mode: NAND or FlexBus. The
MCF5441x is capable of booting from NAND Flash Memory device.
4.8
Accelerometer
An MMA7361L accelerometer is connected to three ADC inputs. There are 4 GPIO signals used to
configure the MMA7361L that are optional on the TWR-MCF5441X. The MMA7361L is wired as shown
here (as recommended in the MMA7361L Data Sheet):
