Freescale Semiconductor HCS08 Series, Справочное руководство

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Chapter 2 Pins and Connections
MC9S08JS16 MCU Series Reference Manual, Rev. 4
Freescale Semiconductor 27
NOTE
When an alternative function is first enabled, it is possible to get a spurious
edge to the module. User software must clear any associated flags before
interrupts are enabled.
Table 2-1 illustrates the priority if multiple modules
are enabled. The highest priority module will have control over the pin.
Selecting a higher priority pin function with a lower priority function
already enabled can cause spurious edges to the lower priority module. All
modules that share a pin must be disabled before another module is enabled.
5 8 PTA0 KBIP0 TPMCH0
6 — NC
7 9 PTA1 KBIP1 MISO
8 10 PTA2 KBIP2 MOSI
9 11 PTA3 KBIP3 SPSCK
10 12 PTA4 KBIP4 SS
11 13 V
DD
12 — NC
13 14 V
SS
14 15 USBDN
15 16 USBDP
16 17 V
USB33
17 18 PTA5 KBIP5 TPMCH1
18 — NC
19 19 PTA6 KBIP6 RxD
20 20 PTA7 KBIP7 TxD
21 1 PTB4 XTAL
22 2 PTB5 EXTAL
23 3 V
SSOSC
24 — NC
Table 2-1. Pin Availability by Package Pin-Count (continued)
Pin Number
(Package)
<-- Lowest Priority --> Highest
24 (QFN) 20 (SOIC) Port Pin Alt 1 Alt 2