MMCCMB2103UM/D
User’s Manual
56
Connector Information
Figure 4-10 Logic Analyzer Connector J16 (C) Pin Assignments
J16
NC
1
•
•
38 NC
NC
2
•
•
37
NC
OE_b
3
•
•
36
TEA_b
MIC2[4]
4
•
•
35
MIC2[35]
MIC2[5]
5
•
•
34
MIC2[34]
MIC2[6]
6
•
•
33
IRQ_b[0]
MIC2[7]
7
•
•
32
DVSP_b[0]
TSIZ[1]
8
•
•
31
RXDLCAN
TSIZ[0]
9
•
•
30
TXDLCAN0
MIC2[10]
10
•
•
29
RSTOUT_b
MIC2[11]
11
•
•
28
MIC2[28]
PSTAT[3]
12
•
•
27
EB_b[3]
PSTAT[2]
13
•
•
26
EB_b[2]
PSTAT[1]
14
•
•
25
EB_b[1]
PSTAT[0]
15
•
•
24
EB_b[0]
RESET_b
16
•
•
23
MIC2[23]
MIC2[17]
17
•
•
22
MIC2[22]
MIC2[18]
18
•
•
21
MIC2[21]
MIC2[19]
19
•
•
20
MIC2[20]
Table 4-9 Logic Analyzer Connector J16 (C) Signal Descriptions
Pin
Mnemonic
Signal
1, 2, 37, 38
NC
No connection
3
OE_b
OUTPUT ENABLE — Active-low output that indicates that a bus access is a
read access; enables slave devices to drive the data bus.
4 — 7, 10, 11, 17
— 23, 28, 34, 35
MIC2[x]
MICTOR PINS — Open pins of this Mictor connector, pins that may be used to
connect other system signals to a logic analyzer.
8, 9
TSIZ[1], TSIZ[0] TRANSFER SIZE (lines 1, 0) — Signals that indicate the size of an external
transfer.
12—15
P_PSTAT[3] —
P_PSTAT[0]
PROCESSOR STATUS (lines 3—0) — Output signals that provide external
status indications for the resident MCU.
16
RESET_b
RESET IN – Active-low input signal that starts a system reset: a reset of the
MMC2080 device and most peripherals.
24 — 27
EB_b[0] —
EB_b[3]
ENABLE BYTES 0—3 — Active-low outputs active during an operation to
corresponding data bits (D31-D24 for enable byte 0, D23-D16 for enable byte 1,
D15-D8 for enable byte 2, D7-D0 for enable byte 3).
29
RSTOUT_b
RESET OUT – Active-low output that resets external components. Activation of
any internal reset sources asserts this line.
30
TXDLCAN0
TRANSMIT CAN DATA (line 0) — CAN-protocol output signal.
31
RXDLCAN
RECEIVE CAN DATA — CAN-protocol input signal.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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