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FIBOCOM SU806 Series Hardware Guide

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enter sleep mode. When module in sleep mode, pull down KEY_PWR_ON pin 0.1s~0.5s and then

release it, module can be waked up.

3.2.2

Reset

Support one key (KEY_PWR_ON) reset and two key (KEY_PWR_ON & KEY_RESIN_N) reset; and two

key reset mode is default.

One key (KEY_PWR_ON) reset: when module in operating mode, pull down KEY_PWR_ON pin 0.6s~6s,

user interface will display selection box (select power off or restart); pull down KEY_PWR_ON pin 7s~10s

module will be forced reset. The reset timing is shown as follows:

≤

10s

KEY_PWR_N

DCDCGEN1V85

V B A T

Figure 3-7 Force reset timing

Two key (KEY_PWR_ON & KEY_RESIN_N) reset: when module in operating mode, pull down

KEY_PWR_ON and KEY_RESIN_N pin 7s~10s at the same time, module will be forced reset. The reset

reference circuit please refer to power on circuit design.

3.2.3

Volume Control

KEY_VOL_UP and KEY_VOL_DOWN is the volume up and volume down control; its circuit design can

refer to the power on keypad circuit.

3.3

USB

The SU806 series module supports one USB 2.0 interface; USB2.0 supports HS (480Mbps) modes and

compatible USB1.1 FS (12Mbps). Supports USB OTG (additional 5V power supply is required), and does

not support HUB expansion when serving as USB master device. Its pin definition is shown in the

following table:

Содержание SU806-LA

Страница 1: ...FIBOCOM SU806 LA Hardware Guide Version V2 0 2 Date 2022 04 02 ...

Страница 2: ...093 and different antenna configurations 4 For FCC Part 15 31 h and k The host manufacturer is responsible for additional testing to verify compliance as a composite system When testing the host device for compliance with Part 15 Subpart B the host manufacturer is required to show compliance with Part 15 Subpart B while the transmitter module s are installed and operating The modules should be tra...

Страница 3: ...of the end product which integrates this module The end user manual shall include all required regulatory information warning as show in this manual Federal Communication Commission Interference Statement This device complies with Part 15 of the FCC Rules Operation is subject to the following two conditions 1 This device may not cause harmful interference and 2 this device must accept any interfer...

Страница 4: ...ity then the grantee shall provide a notice stating that the final host product still requires Part 15 Subpart B compliance testing with the modular transmitter installed This device is intended only for OEM integrators under the following conditions For module device use 1 The antenna must be installed such that 20 cm is maintained between the antenna and users and 2 The transmitter module may no...

Страница 5: ...k Radio transmission and reception TDD 3GPP TS 36 521 1 V10 6 0 User Equipment UE conformance specification Radio transmission and reception Part 1 Conformance testing 3GPP TS 21 111 V10 0 0 USIM and IC card requirements 3GPP TS 51 011 V4 15 0 Specification of the Subscriber Identity Module Mobile Equipment SIM ME interface 3GPP TS 31 102 V10 11 0 Characteristics of the Universal Subscriber Identi...

Страница 6: ...d FIBOCOM SU806 Series Hardware Guide Page 6 of 79 Bluetooth Radio Frequency TSS and TP Specification 1 2 2 0 2 0 EDR 2 1 2 1 EDR 3 0 3 0 HS August 6 2009 Bluetooth Low Energy RF PHY Test Specification RF PHY TS 4 0 0 December 15 2009 1 3 Related Document FIBOCOM Sx806 Series SMT Design Guide ...

Страница 7: ...them the production models SU806 CN 01 and SU806 CN 11 support WCDMA Band5 Table 2 1 Bands supported of SU806 LA Mode Band Note GSM GPRS EDGE GSM850 EGSM900 DCS1800 PCS1900 WCDMA Band 2 4 5 8 FDD LTE Band2 3 4 5 7 12 17 28 TDD LTE Band40 41 2496 2690MHz WIFI 802 11b g n 2402 2482 MHz BT4 2 LE 2402 2480 MHz GNSS GPS BeiDou 2 2 Product Specification SU806 series module is available in 262 LCC LGA pa...

Страница 8: ...for LTE FDD bands Class 3 23dBm 2dB for LTE TDD bands GSM GPRS EDGE features R99 CSD transmission rate 9 6kbps 14 4kbps GPRS Support GPRS multi slot class 12 Coding formats CS 1 CS 2 CS 3 and CS 4 4 Rx time slots per frame maximum EDGE Support EDGE multi slot class 12 Support GMSK and 8 PSK Uplink encoding formats CS 1 4 and MCS 1 9 Uplink encoding formats CS 1 4 and MCS 1 9 WCDMA features Support...

Страница 9: ...udio Input 3 analog microphone inputs Integrated internal bias Audio output Class AB stereo headphone output Class AB differential handset output Class D differential speaker amplifier output USB interface USB2 0 HS interface with data transfer rate up to 480 Mbps Supports USB OTG additional 5V power supply is required and does not support HUB expansion when serving as USB master device U SIM inte...

Страница 10: ...apsulation 146 LCC pin 116 LGA pin Weight about 9 0g Temperature range Operating temperature 20 C 75 C Storage temperature 40 C 95 C Software update USB OTA SD RoHS Comply with RoHS standard Note When the module is operating within this temperature range the functions of it are normal and the relevant performance meets the 3GPP standard 2 3 Functional Block Diagram Functional diagram shows the mai...

Страница 11: ... ver LC M U AR T TP A D C R ES E T P W R K E Y 26M XO V B AT S A W PA A N T_M A I N A N T_D I V A N T_G N S S Tx P R x A i r I nt erf ace M em ory C onnect i vi ty M ul t i m edi a C AM A N T_W I FI B T V R TC LP D D R 3 S D R AM eM M C P ow er S w i t ch A U D I O I 2C S P I U S I M S D I O G P I O U SB V oL key D R x S A W S A W LN A P R x C ont rol Figure 2 1 Functional block diagram ...

Страница 12: ...n authorization All Rights Reserved FIBOCOM SU806 Series Hardware Guide Page 12 of 79 2 4 Pin Definition 2 4 1 Pin Assignment Figure 2 2 Pin assignment top view Note NC represent No Connect the pin of this position is reserved and does not need to be connected ...

Страница 13: ...ut OD Open Drain Pin descriptions of SU806 series module are presented in the following table Table 2 5 Pin description Pin Name Pin Number I O Functional Description Note Power supply VBAT 1 2 145 146 PI Main power input VRTC 126 PI PO RTC clock power supply VDD1V85 111 PO IO voltage output VDD1V8 125 PO Camera IO voltage output VDDCAMMOT 152 PO Power output for camera moto VDDSDCORE 38 PO Power ...

Страница 14: ...9 150 160 178 180 182 184 186 188 189 192 193 198 200 201 208 209 211 218 221 235 245 246 250 251 262 Ground Battery supply interface CHARGE_SEL 127 DI Charge modes select Use internal charging when it s floating and turn off internal charging when it s grounded VBAT_SNS 133 AI Battery voltage sense VBAT_THERM 134 AI Battery thermistor output SENSE_N 258 AI Battery fuel gauge negative input Reserv...

Страница 15: ... DO U SIM card 2 reset UIM2_DET 17 DI U SIM card 2 hot plug detection Disabled by default cannot used as general GPIO UIM1_DATA 25 I O U SIM card 1 data UIM1_CLK 24 DO U SIM card 1 clock UIM1_RST 23 DO U SIM card 1 reset UIM1_DET 22 DI U SIM card 1 hot plug detection Disabled by default cannot used as general GPIO SDIO interface SD_DET 45 DI SD card detect Active low SD_DATA3 44 I O SD card data 3...

Страница 16: ...efault CAM_I2C_SCL1 239 DO I2C clock For front depth camera by default CAM_I2C_SDA1 240 I O I2C data For front depth camera by default USB interface USB_VBUS 141 142 PI USB 5V input USB_DP 14 AI AO USB HS data USB_DM 13 AI AO USB HS data USB_ID 16 DI USB OTG detection UART interface UART0_TX 34 DO UART0 data transmission UART0_RX 35 DI UART0 data reception UART0_CTS 36 DI UART0 clear to send UART0...

Страница 17: ... AO MIPI_DSI0_LN0_N 54 AO MIPI display serial interface lane MIPI_DSI0_ LN0_P 55 AO MIPI_DSI0_ LN1_N 56 AO MIPI_DSI0_ LN1_P 57 AO MIPI_DSI0_LN2_N 58 AO MIPI_DSI0_LN2_P 59 AO MIPI_DSI0_LN3_N 60 AO MIPI_DSI0_LN3_P 61 AO LCD_RST 49 DO LCD reset signal PWM 29 DO LCD backlight PWM LCD_TE 50 DI LCD tearing effect Keep floating if unused GPIO_25 190 DO LCD backlight enable Touch panel interface TP_INT 30...

Страница 18: ...reset signal MCAM_PWDN 80 DO Rear camera power down MIPI_CSI1_CLK_N 63 AI MIPI front camera serial interface clock MIPI_CSI1_CLK_P 64 AI MIPI_CSI1_LN0_N 65 AI MIPI front camera serial interface lane MIPI_CSI1_LN0_P 66 AI MIPI_CSI1_LN1_N 67 AI MIPI_CSI1_LN1_P 68 AI SCAM_MCLK 75 AI Front camera master clock SCAM_RST 81 AI Front camera reset signal SCAM_PWDN 82 AI Front camera power down MIPI_CSI1_LN...

Страница 19: ...A left channel output HPH_GND 137 Headphone PA ground sensing HPH_R 136 AO Headphone PA right channel output HPH_DET 139 AI Headset detection MIC2_P 6 AI Headset MIC difference input MIC1_M 5 AI MIC1 difference input MIC1_P 4 AI MIC1 difference input MIC_BIAS1 219 AO MIC bias1 MIC3_P 220 AI Sub MIC difference input MIC_BIAS2 227 AO MIC bias2 Antenna interface ANT_MAIN 87 AI AO 2G 3G 4G main antenn...

Страница 20: ...nput0 CHG_EN 210 AO Charge enable ADC4_BAT_ID 260 AI BAT_ID detection The PIN260 is NC which product models support internal charging NFC_CLK 256 DO NFC clock Reserved NFC_DWL_REQ 257 DI NFC power reset control Reserved GPIO interface GPIO_134 33 I O General Purpose Input and Output 1 8V power domain INPUT WPD GPIO_129 90 I O INPUT WPD GPIO_135 98 I O INPUT WPU GPIO_136 99 I O INPUT WPU GPIO_137 1...

Страница 21: ...4 I O INPUT WPU GPIO_88 153 I O INPUT WPU GPIO_30 159 I O INPUT WPD GPIO_29 183 I O INPUT WPD GPIO_27 187 I O INPUT WPD GPIO_85 202 I O OUTPUT GPIO_154 203 I O INPUT WPD GPIO_155 205 I O INPUT WPD GPIO_28 206 I O INPUT WPD GPIO_24 207 I O INPUT WPD Boot configuration doesn t add pull up GPIO_11 241 I O INPUT WPD GPIO_7 242 I O INPUT WPD GPIO_143 243 I O INPUT WPU GPIO_10 244 I O INPUT WPD GPIO_141...

Страница 22: ...er I O Functional Description Note NC 154 191 197 199 204 222 to 224 247 to 249 255 Keep floating Note H High voltage tolerant L Low voltage tolerant Hiz High impedance WPU Weak pull up WPD Weak pull down The GPIOs with WPU aren t recommended as the enable control of default highly efficient devices For example backlight enable of LCM and audio amplifier enable ...

Страница 23: ...ay be powered off or restarted The VBAT voltage drop is shown as the following figure B urstTransm i t B urstTransm i t V B A T 3 5V 3 0V D rop 500m V Figure 3 1 VBAT voltage drop 3 1 1 Power Input External power source supplies the module by VBAT pins To ensure the instant power voltage is no less than 3 5V it is recommended to connect two 220μF tantalum capacitors with low ESR and decoupling cap...

Страница 24: ...power fluctuations during module operation it is required to adopt low ESR capacitor LDO or DCDC power requires not less than 440uF capacitor Battery power can be properly reduced to 100 220uF capacitor 1uF 100nF Filter capacitor Filter clock and digital signal interference 39pF 33pF 18pF 8 2pF 6 8pF Filter capacitor Filter high frequency interference 3 1 2 VRTC VRTC is the power supply of the int...

Страница 25: ...nce design 3 1 3 Power Output The SU806 series module provides multiple power outputs for peripheral circuits It is recommended to connect 33pF and 10pF capacitors in parallel with every power to avoid high frequency interference effectively Table 3 4 Power output Pin Name Programmable Voltage Range V Default Voltage V Drive Current mA VDD1V85 1 75 2 1 1 85 200 VDD1V8 1 10625 1 9 1 8 200 VDDCAMMOT...

Страница 26: ...eep wake up Its pin definition is shown as follow table Table 3 5 Power on off signal Pin Name Pin Number I O Description Note KEY_PWR_ON 114 DI Active low module power on off restart sleep wake up the module CBL_PWR_N 261 DI Active low just have module power on function 3 2 1 1 Power on After module s VBAT pin is powered pull down KEY_PWR_ON or CBL_PWR_N pin for 3 5s 6s can trigger module power o...

Страница 27: ...her Powers Figure 3 6 Power on timing 3 2 1 2 Power off Normal power off when module in operating mode pull down KEY_PWR_ON pin 0 6s 6s user interface will display selection box select power off or restart Note When the system is abnormal or shutdown can use force power off method to power off the module please use normal method generally otherwise may cause data loss and other anomalies 3 2 1 3 S...

Страница 28: ...d reset The reset timing is shown as follows 7s t 10s KEY_PWR_N DCDCGEN1V85 VB AT 7s Figure 3 7 Force reset timing Two key KEY_PWR_ON KEY_RESIN_N reset when module in operating mode pull down KEY_PWR_ON and KEY_RESIN_N pin 7s 10s at the same time module will be forced reset The reset reference circuit please refer to power on circuit design 3 2 3 Volume Control KEY_VOL_UP and KEY_VOL_DOWN is the v...

Страница 29: ... 6 USB 2 0 pin definition Pin Name Pin Number I O Description Note USB_VBUS 141 142 PI USB VBUS 5V input USB_DP 14 AI AO USB HS data USB_DM 13 AI AO USB HS data USB_ID 16 DI USB OTG detection The reference design of USB 2 0 is show as follow figure Connector VBUS DM DP ID GND Module USB_DM USB_DP USB_ID USB_VBUS 1uF Figure 3 8 USB 2 0 reference design ...

Страница 30: ...smission rate is 480Mbps Please pay attention to the following requirements in PCB layout USB_DP and USB_DM signal cables are required to be parallel and equal in length differential cable length controlled within 2 mm while the right angle route shall be avoided and differential 90Ω impedance shall be controlled USB2 0 differential signal cable laid on the signal layer nearest to the ground with ...

Страница 31: ...st to send UART1_TX 94 DO UART1 data transmission Debug_UART serial port by default UART1_RX 93 DI UART1 data reception UART2_TX 226 DO UART2 data transmission Reserved UART2_RX 225 DI UART2 data reception Reserved Note Please do not pull down UART1_TX before module power on otherwise module will not be powered on normally All series ports are 1 8V voltage domain if the peripheral is other voltage...

Страница 32: ...rection Figure 3 11 Level shift reference design 2 3 5 SPI SU806 series module provides one master only SPI interface the pin definition is shown in the following table Table 3 9 SPI pin definition Pin Name Pin Number I O Description Note SPI_CLK 116 DO SPI clock SPI_CS 117 DO SPI chip selects SPI_MISO 118 DI SPI master input slave output SPI_MOSI 119 DO SPI master output slave input 3 6 U SIM The...

Страница 33: ...ignal UIM1_DET 22 DI U SIM 1 plug detection Disabled by default cannot used as general GPIO UIM2_DATA 20 I O U SIM 2 data UIM2_CLK 19 DO U SIM 2 clock UIM2_RST 18 DO U SIM 2 reset UIM2_DET 17 DI U SIM 2 plug detection Disabled by default cannot used as general GPIO VDDSIM1 26 PO U SIM 1 power supply VDDSIM2 21 PO U SIM 2 power supply U SIM reference design is shown as the following figure 100K USI...

Страница 34: ... capacitors of the U SIM card signal and the ESD device should be placed close to the card holder 3 7 SDIO SU806 series module supports one SDIO interface The pin definition is shown in the following table Table 3 11 SDIO pin definition Pin Name Pin Number I O Description Note SD_DET 45 DI SD card detect Active low SD_DATA3 44 I O SD card data3 SD_DATA2 43 I O SD card data2 SD_DATA1 42 I O SD card...

Страница 35: ... power and can provide about 400mA current SD3 0 need external LDO with power driver ability more than 800mA 2 Match all SD signals length and pay attention to controlling the width of trace 3 Pull up SD_DET with VDD1V85 4 SDIO is a high speed digital signal cable needs to be shielded 3 8 GPIO SU806 series module have rich GPIOs and the interface level is 1 8V The pin definition is shown in the fo...

Страница 36: ...UT WPD YES GPIO_121 105 L OUTPUT YES GPIO_138 106 H INPUT WPU YES GPIO_91 108 L INPUT WPD YES GPIO_32 112 L INPUT WPD YES GPIO_89 113 L OUTPUT YES GPIO_122 115 Hiz WPD YES GPIO_139 123 H INPUT WPU YES GPIO_140 124 H INPUT WPU YES GPIO_88 153 H INPUT WPU YES GPIO_30 159 L INPUT WPD YES GPIO_29 183 L INPUT WPD YES GPIO_27 187 L INPUT WPD YES GPIO_85 202 Hiz OUTPUT YES GPIO_154 203 L INPUT WPD YES GP...

Страница 37: ...PIO_23 254 L INPUT WPD YES Note H High voltage tolerant L Low voltage tolerant Hiz High impedance WPU Weak pull up WPD Weak pull down 3 9 I2 C SU806 series module provides four I2C interfaces for TP camera sensor etc And four I2C interfaces are all internal pull up when in use please reserve pull up resistors to 1 8V power domain The pin definition is shown in the following table Table 3 13 I2C pi...

Страница 38: ...I2C has more than one peripheral please ensure the uniqueness of every peripheral address 3 10 RBG SU806 series module provides three RGB LED inputs its pin definition is shown in the following table Table 3 14 RGB pin definition Pin Name Pin Number I O Description Note LED_B 194 AI RGB LED input 2 LED_G 195 AI RGB LED input 1 LED_R 196 AI RGB LED input 0 3 11 ADC SU806 series module provides one ...

Страница 39: ...ge if use coulomb counter IC externally please connect SENSE_P and SENSE_N pin to GND Table 3 16 Battery power supply pin definition Pin Name Pin No I O Description Note CHARGE_SEL 127 DI Charge modes select Use internal charging when it s floating and turn off internal charging when it s grounded VBAT_SNS 133 AI Battery voltage sense VBAT_THERM 134 AI Battery thermal detect input NTC resistor is ...

Страница 40: ...le output 3 14 Vibration Motor Driver Interface Table 3 18 Vibration motor driver pin definition Pin Name Pin Number I O Description Note VIB_DRV_N 28 PO Vibration motor driver output Can be configured as LDO mode and connect with Vibration motor 3 15 LCM The video output of SU806 series module can support single screen display Its screen interface is based on MIPI_DSI standard and supports 4 sets...

Страница 41: ...play serial interface Lane 1 MIPI_DSI0_LN1_P 57 AO MIPI display serial interface Lane 1 MIPI_DSI0_LN2_N 58 AO MIPI display serial interface Lane 2 MIPI_DSI0_LN2_P 59 AO MIPI display serial interface Lane 2 MIPI_DSI0_LN3_N 60 AO MIPI display serial interface Lane 3 MIPI_DSI0_LN3_P 61 AO MIPI display serial interface Lane 3 LCD_RST 49 DO LCD reset PWM 29 DO LCD backlight PWM LCD_TE 50 DI LCD tearing...

Страница 42: ...speed signal It is recommended to connect the common mode inductor in series near the LCD connector to reduce the electromagnetic interference of the circuit 2 MIPI routing is recommended to be in the inner layer with three dimensional grounding 3 The MIPI signal needs to be controlled with a differential impedance of 100Ω tolerance 10 4 The total length of the trace must 70 mm VIAs 4 5 The intra ...

Страница 43: ...59 62 9266 MIPI_DSI0_LN3_N 60 63 84148 0 39457 MIPI_DSI0_LN3_P 61 63 44691 3 16 TP SU806 series module provides one I2C interface can be used to connect the touch panel and it provides power interrupt reset pins The pin definition of the module is shown in the follow table Table 3 21 TP pin definition Pin Name Pin Number I O Description Note TP_INT 30 DI LCD TP interrupt signal TP_RST 31 DO LCD TP...

Страница 44: ...era interface is shown in the following table Table 3 22 Camera interface pin definition Pin Name Pin Number I O 4 Lane 2 Lane 1 Lane Note VDD1V8 125 PO DOVDD power supply 1 8V VDDCAMA 129 PO AVDD power supply 2 8V VDDCAMMOT 152 PO Camera focus motor drive AFVDD power supply 2 8V VDDCAMCORE 151 PO DVDD power supply 1 2V MIPI_CSI0_CLK_P 229 AI MIPI rear camera serial interface clock MIPI_CSI0_CLK_N...

Страница 45: ...80 DO Rear camera power down CAM_I2C_SCL0 83 DO Rear camera I2C clock CAM_I2C_SDA0 84 I O Rear camera I2C data MIPI_CSI1_CLK_N 63 AI MIPI front camera serial interface clock MIPI_CSI1_CLK_P 64 AI MIPI front camera serial interface lane 0 MIPI_CSI1_LN0_N 65 AI MIPI front camera serial interface lane 0 MIPI_CSI1_LN0_P 66 AI MIPI front camera serial interface lane 0 MIPI_CSI1_LN1_N 67 AI MIPI front c...

Страница 46: ...7 1 Rear Camera Reference design of rear camera is shown as follows Module MIPI_CSI0_CLK_P MCAM_RST MIPI_CSI0_CLK_N MIPI_CSI0_LN3_P MIPI_CSI0_LN3_N MIPI_CSI0_LN2_P MIPI_CSI0_LN2_N MIPI_CSI0_LN1_P MIPI_CSI0_LN1_N MIPI_CSI0_LN0_P MIPI_CSI0_LN0_N CAM Connector CAM_I2C_SDA0 CAM_I2C_SCL0 MCAM_PWDN MCAM_MCLK CLK_P MCLK CLK_N DAT3_P DAT3_N DAT2_P DAT1_P DAT1_N C A M C onnect or PWD RST SCL SDA DAT2_N DAT...

Страница 47: ... I E M I E M I 100nF 100nF Figure 3 18 Front camera reference design 3 17 3 Depth Camera Pin definition of depth camera is shown as follow Module MIPI_CSI1_LN3_P DCAM_RST MIPI_CSI1_LN3_N MIPI_CSI1_LN2_P MIPI_CSI1_LN2_N CAM_I2C_SDA1 CAM_I2C_SCL1 DCAM_PWDN DCAM_MCLK CLK_P MCLK CLK_N DAT0_P DAT0_N C A M C onnect or PWD RST SCL SDA V D D 1V 85 NC NC V D D C A M A AVDD DOVDD V D D 1V 8 E M I E M I 10uF...

Страница 48: ...fferential signal must not exceed 1 0pF The matters need attention of another camera signal 9 CAM_CLK is a high speed clock signal and requires three dimensional grounding 10 If two cameras share the same I2C interface please confirm the I2C addresses of the two cameras do not conflict 11 The analog voltage VDDCAMA routing should be away from interference sources otherwise it is easy to bring inte...

Страница 49: ...MIPI_CSI1_LN2_P 73 19 19065 0 18467 MIPI_CSI1_LN2_N 72 19 37532 MIPI_CSI1_LN3_P 71 19 95271 0 07975 MIPI_CSI1_LN3_N 70 19 87296 3 18 Sensor SU806 series module supports I2C interface to communicate with various types of sensors such as accelerometer sensor ambient light sensor and magnetic sensor etc Table 3 24 Sensor interface pin definition Pin Name Pin Number I O Description Note SENSOR_I2C_SCL...

Страница 50: ...sing HPH_R 136 AO Headset right channel output HPH_DET 139 AI Headset detection MIC2_P 6 AI Headset mic input MIC1_M 5 AI Main mic difference input MIC1_P 4 AI Main mic difference input MIC3_P 220 AI Sub mic input Design notice 1 SU806 series module has MIC bias circuit internally and no external addition is required 2 The SPK is configured as class D amplifier output cannot connect with amplifier...

Страница 51: ...ches are recommended Keep audio PCB routing away from the antenna and high frequency digital signal Reserve LC filter circuit in audio circuit to reduce EMI Audio routing needs to be masked 3 19 2 Microphone Circuit Design Module MIC_M MIC_P 33pF 33pF 100pF Figure 3 20 Microphone reference design 3 19 3 Earpiece Circuit Design 0R 33pF 100pF 0R Module EAR_M EAR_P 33pF Figure 3 21 Earpiece reference...

Страница 52: ...rdware Guide Page 52 of 79 3 19 4 Headset Circuit Design HPH_R 0R 33 pF HPH_L HPH_GND HPH_DET MIC2_P 1K Module 33 pF 33 pF Figure 3 22 Headset reference design Note Please choose bidirectional TVS for headset ESD protection 3 19 5 Speaker Circuit Design Module SPK_M SPK_P 39pF 39pF Figure 3 23 Speaker reference design ...

Страница 53: ... download interface Connect the KEY_FORCE_BOOT with GND when power on the module can enter the emergency download mode which is used for the final processing mode when the product fails to power on or run normally To facilitate the subsequent software upgrade and product debugging please reserve the test pin of this pin Reference design is shown in the following figure Module FORCE_BOOT S1 1K Figu...

Страница 54: ...nsmit RF signal the ANT_DRX is used for diversity reception Table 4 1 Main DRX pin definition Pin Name Pin Number I O Description Note ANT_MAIN 87 AI AO 2G 3G 4G main antenna ANT_DRX 131 AI Diversity reception antenna 4 1 1 Operating Band Table 4 2 Module operating band of SU806 LA Mode Band Tx MHz Rx MHz GSM 850 824 849 869 894 900 880 915 925 960 1800 1710 1785 1805 1880 1900 1850 1910 1930 1990...

Страница 55: ...e the SU806 series module it is necessary to connect the antenna pin with the RF connector or antenna feed point on the main board via an RF trace Microstrip trace is recommended for RF trace with insertion loss within 0 2dB and impedance at 50Ω A π type circuit is reserved between the module and the antenna connector or feed point for antenna debugging Two parallel components are directly connect...

Страница 56: ... interface definition Pin Name Pin Number I O Description Note ANT_WIFI BT 77 AI AO WIFI BT antenna 4 2 1 WIFI BT Operating Frequency Table 4 6 WIFI BT operating frequency Mode Frequency Unit WIFI 2402 2482 MHz BT4 2 2402 2480 MHz 4 2 2 WIFI BT Antenna Reference Design WIFI BT antenna reference design is shown in the following figure ANT_WIFI BT WIFI BT_Antenna NC 0R NC Figure 4 2 WIFI BT antenna ...

Страница 57: ...uilt in LNA The passive antenna is used in the design of the device Microstrip trace is recommended for the GNSS RF route with insertion loss within 0 2dB and impedance at 50Ω The GNSS antenna reference design is shown in the following figure Module ANT_GNSS GNSS_Antenna NC 0R 82nH Figure 4 3 GNSS passive antenna reference design Note For GNSS passive antenna it is recommended to add an 82nH indic...

Страница 58: ...high performance LDO be used to power the antenna The active antenna reference circuit is shown in the following figure Module ANT_GNSS 33pF GNSS_Antenna 0R NC NC VDD_3 3V 100pF 10R 56nH 1uF Figure 4 4 GNSS active antenna reference design 4 4 Antenna Requirement SU806 series module provides four antenna interfaces main diversity WIFI BT and GNSS The antenna requirements are as follows Table 4 9 An...

Страница 59: ...rement Standard Antenna Requirement Insertion loss 2dB 2 3 2 7GHz WIFI BT VSWR 2 Gain dBi 1 Max input power W 5 Input impedance Ω 50 Polarization type vertical direction Insertion loss 1dB GNSS Frequency range 1559MHz 1607MHz Polarization type right circular or linear polarization VSWR 2 typical Passive antenna gain 0dBi Active antenna NF 15dB typical Active antenna gain 2dBi ...

Страница 60: ... material the trace width W the ground clearance S and the height of the reference ground plane H The control of the characteristic impedance of the PCB usually in two ways microstrip trace and coplanar waveguide To illustrate the design principles the following figures show the structural designs of microstrip trace and coplanar waveguide when the impedance cable is at 50Ω Microstrip trace entire...

Страница 61: ...l cable at 50Ω impedance The GND pin adjacent to the RF pin should not have thermal welding plate and should be in full contact with the ground The distance between the RF pin and the RF connector should be as short as possible At the same time avoid the right angle route The recommended route angle is 135 degrees Attention should be paid to the establishment of the component package and the signa...

Страница 62: ...Support Wake on WLAN WoWLAN Support ad hoc mode Support WAPI Support AP mode Support Wi Fi Direct Support MCS 0 7 for HT20 6 2 WIFI Performance Test condition 3 8V power supply environment temperature 25 C Table 6 1 WIFI transmit power Frequency Mode Date Rate Bandwidth MHz TX Power dBm 2 4G 802 11b 1Mbps 20 17 3 11Mbps 20 17 3 802 11g 6Mbps 20 16 3 54Mbps 20 13 3 802 11n MCS0 20 15 3 MCS7 20 13 3...

Страница 63: ...el bandwidth is 2MHz and can accommodate 40 channels Its main features are as follows BT 4 2 BR EDR BLE Support for ANT protocol Support for BT WLAN coexistence operation including optional concurrent receive Up to 3 5 piconets master slave and page scanning Table 6 3 BT rate and version information Version Date Rate Throughput Note BT1 2 1Mbit s 80Kbit s BT2 0 EDR 3Mbit s 80Kbit s BT3 0 HS 24Mbit...

Страница 64: ...ioning systems The module is embedded with LNA which can effectively improve the sensitivity of GNSS 7 2 Performance Test condition 3 8V power supply environment temperature 25 C Table 7 1 GNSS positioning performance Parameter Description Typical Result Unit Sensitivity Acquisition 146 dBm Tracking 155 dBm C No 130dBm 39 5 dB Hz TTFF Cold Start 40 s Warm Start 32 s Hot Start 3 s CEP Static accura...

Страница 65: ...Ratings The functionality of SU806 series module is subject to the absolute maximum minimum values listed in the following table Do not exceed these parameters or the part may be damaged permanently Operation at absolute maximum ratings is not guaranteed Table 8 2 Absolute maximum ratings Parameter Description Min Max Unit VBAT Power supply 0 3 5 V USB_VBUS VBUS 5V input 0 3 17 V 8 3 Power Consump...

Страница 66: ...DPC Default Paging Cycle 256 3 2 FDD LTE DPC Default Paging Cycle 256 3 2 Radio Off AT CFUN 4 Flight Mode 2 5 IGSM RMS GSM voice RMS Current GSM850 PCL 5 267 mA GSM850 PCL 19 98 EGSM900 PCL 5 277 EGSM900 PCL 19 103 DCS1800 PCL 0 203 DCS1800 PCL 15 101 PCS1900 PCL 0 185 PCS1900 PCL 15 95 IGSM MAX GSM voice Peak current GSM850 PCL 5 1900 mA EGSM900 PCL 5 1950 DCS1800 PCL 0 1420 PCS1900 PCL 0 1350 IG...

Страница 67: ...850 Gamma 6 1UL 4DL 178 mA GSM850 Gamma 6 4UL 1DL 312 EGSM900 Gamma 6 1UL 4DL 173 EGSM900 Gamma 6 4UL 1DL 315 DCS1800 Gamma 5 1UL 4DL 162 DCS1800 Gamma 5 4UL 1DL 318 PCS1900 Gamma 5 1UL 4DL 161 PCS1900 Gamma 5 4UL 1DL 311 IWCDMA RMS WCDMA RMS Current Band2 max power 588 mA Band4 max power 650 Band5 max power 590 Band8 max power 610 ILTE RMS FDD data RMS Current Band2 max power 10MHz 1RB 600 mA Ban...

Страница 68: ...ansmit Power The transmit power of each band of the SU806 module is shown in the following table Test condition 3 8V power supply environment temperature 25 C maximum power test of LTE 10M 12RB Table 8 4 RF Transmit power of SU806 LA Mode Band Max Power dBm Min Power dBm GSM 850 GMSK 33 2 5 5 900 GMSK 33 2 5 5 1800 GMSK 30 2 0 5 1900 GMSK 30 2 0 5 GSM 850 8PSK 27 0 3 5 5 900 8PSK 27 0 3 5 5 1800 8...

Страница 69: ...ach frequency band of the SU806 series module is shown in the following table Test condition 3 8V power supply environment temperature 25 C The test bandwidth of LTE sensitivity LTE is 10M RB configuration please refer to 3GPP standard Table 8 5 RF receiver sensitivity of SU806 LA Mode Band Primary Diversity PRX Div 3GPP Requirement Unit GSM 850 109 2 102 dBm 900 108 7 102 dBm 1800 108 5 102 dBm 1...

Страница 70: ...g to the module through various channels that may cause damage so ESD protection should be taken seriously attention In the process of R D production assembly and testing especially in product design ESD protection measures should be taken For example anti static protection should be added at the designed circuit interface and the points susceptible to electrostatic discharge or impact Anti static...

Страница 71: ...ware Guide Page 71 of 79 9 Structural Specification 9 1 Product Appearance SU806 series module product appearance is shown in the following figure Figure 9 1 Module product appearance 9 2 Structural Dimension The structural dimension of SU806 series module is shown in the following figure Figure 9 2 Structural dimension ...

Страница 72: ...m Wireless Inc written authorization All Rights Reserved FIBOCOM SU806 Series Hardware Guide Page 72 of 79 9 3 PCB Soldering Pad and Stencil Design PCB soldering pad and stencil design please refer to FIBOCOM Sx806 Series SMT Design Guide ...

Страница 73: ...FIBOCOM SU806 Series Hardware Guide Page 73 of 79 10 Production and Storage 10 1 SMT SMT production process parameters and related requirements please refer to FIBOCOM Sx806 Series SMT Design Guide 10 2 Carrier and Storage Carrier and storage please refer to FIBOCOM Sx806 Series SMT Design Guide ...

Страница 74: ...scontinuous Reception EGSM Extended GSM900 Band FDD Frequency Division Duplexing GMSK Gaussian Minimum Shift Keying GSM Global System for Mobile Communications HSDPA High Speed Down Link Packet Access IMEI International Mobile Equipment Identity Imax Maximum Load Current LED Light Emitting Diode LSB Least Significant Bit LTE Long Term Evolution CA Carrier Aggregation DLCA Downlink Carrier Aggregat...

Страница 75: ... RHCP Right Hand Circularly PolarizedRMS RMS Root Mean Square RTC Real Time Clock Rx Receive SMS Short Message Service TDMA Time Division Multiple Access TE Terminal Equipment TX Transmitting Direction TDD Time Division Duplexing UART Universal Asynchronous Receiver Transmitter UMTS Universal Mobile Telecommunications System URC Unsolicited Result Code U SIM Universal Subscriber Identity Module US...

Страница 76: ... Value VILmax Maximum Input Low Level Voltage Value VILmin Minimum Input Low Level Voltage Value VImax Absolute Maximum Input Voltage Value VImin Absolute Minimum Input Voltage Value VOHmax Maximum Output High Level Voltage Value VOHmin Minimum Output High Level Voltage Value VOLmax Maximum Output Low Level Voltage Value VOLmin Minimum Output Low Level Voltage Value VSWR Voltage Standing Wave Rati...

Страница 77: ...e Page 77 of 79 Appendix B GPRS Encoding Scheme Table B 0 1 GPRS encoding scheme Encoding method CS 1 CS 2 CS 3 CS 4 Rate 1 2 2 3 3 4 1 USF 3 3 3 3 Pre coded USF 3 6 6 12 Radio Block excl USF and BCS 181 268 312 428 BCS 40 16 16 16 Tail 4 4 4 Coded Bits 456 588 676 456 Punctured Bits 0 132 220 Data Rate Kb s 9 05 13 4 15 6 21 4 ...

Страница 78: ...m rate of uplink and downlink The expression is 3 1 or 2 2 the first number represents the number of downlink timeslots and the second number represents the number of uplink timeslots Active timeslot represents the total number of timeslots that the GPRS device can use for both uplink and downlink communications Table C 0 1 Multilevel multislot allocation Multislot Class Downlink Slot Uplink Slot ...

Страница 79: ...1 GMSK 9 05kbps 18 1kbps 36 2kbps CS 2 GMSK 13 4kbps 26 8kbps 53 6kbps CS 3 GMSK 15 6kbps 31 2kbps 62 4kbps CS 4 GMSK 21 4kbps 42 8kbps 85 6kbps MCS 1 GMSK C 8 80kbps 17 6kbps 35 2kbps MCS 2 GMSK B 11 2kbps 22 4kbps 44 8kbps MCS 3 GMSK A 14 8kbps 29 6kbps 59 2kbps MCS 4 GMSK C 17 6kbps 35 2kbps 70 4kbps MCS 5 8 PSK B 22 4kbps 44 8kbps 89 6kbps MCS 6 8 PSK A 29 6kbps 59 2kbps 118 4kbps MCS 7 8 PSK ...

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