FALCOM JP14-R-LP, Руководство пользователя

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JP14-R-LP & JP14-Q-LP F
ALCOM
GPS R
ECEIVERS
V
ERSION
1.0.0
6 HARDWARE INTERFACE AND CONFIGURATION
SIGNALS
6.1 Interfaces (balls assignment) of the JP14-R-LP
Ball Name I/O Description Level
1 VCC I Main power supply + 3.3 V DC
±
5 %
2 VCC
3 VBAT I Power for RTC and SRAM +3 V DC ±5%
4 VDDK O Core power at 1.5 V. Do not use, leave it open.
5 SDI1 I Serial Data Input A CMOS
6 SDO1 O Serial Data Output A CMOS
7 SDO2 O Serial Data Output B (It is not supported by default GSW3.1.0) CMOS
8 SDI2 I Serial Data Input B (It is not supported by default GSW3.1.0) CMOS
9 NADC_D I Do not use, leave it open.
10 SPI_EN I Control-line for production test. Do not use, leave it open. CMOS
11 SPI_CLK I Control-lines for production test. Do not use, leave it open.
12 SPI_DATA O Control-line for production test. Do not use, leave it open.
13 NC
- Not connected - 14 NC
15 NC
16 GPIO0 I/O General propose input/output CMOS
17 NC - Not connected -
18 GND Digital ground 0 V
19 GND_RF Analogue ground
20 VANT I Power supply for an active antenna
Up to +12 V DC / max. 25
mA
21 RF_IN I GPS signal from connected antenna 50 Ohms @ 1.575 GHz
22 GND_RF Analogue grounds
23 GND_RF
24 VCCRF O Supply voltage of RF section + 2.85 V DC / max. 25 mA
25 GND Digital grounds 0 V
26 GND
27 NSRESET I Do not use, leave it open.
28 T-MARK O 1 PPS Time Mark Output CMOS
29 BOOTSEL I Boots the unit into the Update mode, if it is set to HIGH. CMOS (=VCC)
30 NADC_CS O Control outputs. Do not use, leave it open. CMOS
31 TIMERSYNC O Control outputs. Do not use, leave it open. CMOS
32 CS2 O Control outputs. Do not use, leave it open. CMOS
33 GPIO1 I/O General propose input/output CMOS
34 VCCGSP3 O
Control output for baseband processor. Do not use, leave it
open.
CMOS
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