evertz HD9010TM, Инструкция по эксплуатации, Страница: 45 / 68

HD9010TM High Definition Time Code Master Manual
OPERATION
Revision 2.4.1
Page 3-15
Example 2: Reader in Non Drop Frame, Generator will be in Drop Frame, Sync Point at 1 hour, 4
frame video processing delay between reader timecode and generator time code.
Sync Point: 01:00:00:00
Offset: 00:00:00:04
Reader Generator Reader Generator
00:58:00:00 00;58;00;02 00:59:59:28 01;00;00;02
00:58:00:01 00;58;00;03 00:59:59:29 01;00;00;03
00:58:00:02 00;58;00;04 01:00:00:00 01;00;00;04
00:58:00:03 00;58;00;05 01:00:00:01 01;00;00;05
00:58:00:04 00;58;00;06 01:00:00:02 01;00;00;06
00:58:00:05 00;58;00;07 01:00:00:05 01;00;00;07
00:58:59:28 00;59;00;02 01:00:59:28 01;01;00;04
00:58:59:29 00;59;00;03 01:00:59:29 01;01;00;05
00:59:00:00 00;59;00;04 01:01:00:00 01;01;00;06
00:59:00:01 00;59;00;05 01:01:00:01 01;01;00;07
00:59:00:02 00;59;00;06 01:01:00:02 01;01;00;08
00:59:00:03 00;59;00;07 01:01:00:03 01;01;00;09

In order to convert the generator time exactly to the reader time at the SYNC POINT
make sure the OFFSET is set 00:00:00:00
3.4.8. Generator LTC Parity Mode Selection
The purpose of the phase correction parity bit (LTC bit 27 in 30 FPS, 59 in 25 FPS) is to compensate
for phase reversals in the LTC bi-phase mark modulation that could occur when code inserts are
performed. Use of the bi-phase mark parity bit is optional, as some readers may not recognize its
presence.
GEN LTC PARITY The GEN LTC PARITY item controls the parity mode of the generator.
Select
Ltc parity off to configure the generator for the non parity mode.
The bi-phase mark parity bit will be always set to zero.
Select Ltc parity on to configure the generator for the parity mode. The
bi-phase mark parity bit will be put in a state where every 80 bit word
will contain an even number of logic zeros, in order that the
magnetization transient between bit cell 79 of one word and bit cell zero
of the next shall always be in the same direction.
Ltc parity: off
Ltc parity: on