ETAS
Hardware Description
FETK-T3.0 - User’s Guide
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4
Hardware Description
In this chapter, the function blocks of the FETK-T3.0 are explained in detail.
4.1
Architecture
Fig. 4-1 shows the block diagram of the FETK-T3.0.
Fig. 4-1
FETK-T3.0 Architecture
While the microcontroller accesses the program data (not the program code)
out of the data emulation memory provided by the microcontroller, the content
of the data emulation memory can simultaneously be modified by the calibra-
tion and development system through the FETK-T3.0 interface. This process
enables adjustments of parameters, characteristic lines and maps through the
calibration and development system.
Using the Aurora trace interface, the FETK-T3.0 can acquire measurement data
and send the measured data to the PC.
The 1 Gbit/s Ethernet interface provides communication with the ES89x mod-
ule.
FETK Connector Description
CON1
ECU interface JTAG + Aurora Trace
CON2
Power supply
CON3
Ethernet interface (ES89x module)
CON4
Debugger and Trace interface
Aurora
Trace
ECU
Interface
Connectors
FETK-T3.0
FPGA
Trigger
Unit
Trace
Unit
Aut omat ic
Pow er-On
FETK
Int erf ace
1
Gbit /s
Pow er
Supply
Monit oring
Pow er
Supply
St andby
Pow er
Supply
ECU
Reset &
Power
Cont rol
ECU Reset
Et hernet
Phy
Et hernet
Traf f ic
Det ect ion
Sense ECU Volt age
ECU
Debug
Int erf ace
Dat a Flash
JTAG
UBat t
ECU ED-RAM , Int erf ace Supply
Molex-6
CAL
Wakeup
Aurora
Trace
Trace
Mirror
Memory
Trace
FiFo
Memory
ECU
Access
Unit
Cont rol
Unit
Arbit er
Samt ec-40
JTAG
Arbit rat ion
Buf f ers
Trace
Port
Mirror
JTAG
De Trace
(Samt ec-34)
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