PRESCALER AND SYNTHESIZER
Integrated circuit U402 is the heart of the synthesizer. It
contains the necessary frequency dividers and control cir-
cuitry to synthesize output frequencies by the technique of
dual modulus prescaling. U402 also contains an analog
sample and hold phase detector and a lock detector circuit.
Within the synthesizer (U402) are three programmable
dividers which are loaded serially using the CLOCK, DATA,
and ENABLE inputs (pins 11, 12, and 13 respectively). A
serial data stream (DATA) on pin 12 is shifted into internal
shift registers by low to high transitions on the clock input
(CLOCK) at pin 11. A logic high (ENABLE) on pin 13 then
transfers the program information from the shift registers to
the divider latches.
The reference signal is applied to U402 pin 2 and divided
by the "R" divider. This divides the reference signal down to
a divided reference frequency (F
r
). The typical reference
frequency is 12.8 MHz and the typical divided reference
frequency is 6.25 kHz providing for synthesizer steps of 6.25
kHz for use with both 12.5 kHz and 25 kHz channel spacing.
Other channel spacings are possible by providing proper
programming.
The "A" and "N" dividers process the loop feedback
signal provided by the VCO (by way of the dual modulus
prescaler U401). The output of the "N" divider is a divided
version of the VCO output frequency (F
v
).
Synthesizer U402 also contains logic circuitry to control
the dual modulus prescaler U401. If the locked synthesizer
output frequency is 450 MHz. The prescaler output nomi-
nally will be equal to 3.515625 MHz (450 MHz/128). This
frequency is further divided down to F
v
by the "N" divider
in U402. F
v
is then compared with F
r
in the phase detector
section.
The phase detector output voltage is proportional to the
phase difference between F
v
and F
r
. This phase detector
output serves as the loop error signal. This error signal
voltage tunes the VCO to whatever frequency is required to
keep F
v
and F
r
locked (in phase).
LOOP BUFFER AMPLIFIERS AND LOOP
FILTER
The error signal provided by the phase detector output is
buffered by operational amplifiers (op-amp) U501A and
U501B. The audio modulation signal from U601B is also
applied to the input of U501B. The output of U501B is the
sum of the audio modulation and the buffered error signal.
The output of the second buffer (U501B) is applied to a
loop filter consisting of R506, R507, R508, C505 and C506.
This filter controls the bandwidth and stability of the synthe-
sizer loop. The UHF transmitter synthesizer has a loop
bandwidth of only several Hertz. This is very narrow, result-
ing in an excessively long loop acquisition time. To speed
acquisition, switches U502A and U502C bypass the filter
circuit whenever an ENABLE pulse is received by the Input
Gates.
AUDIO FREQUENCY AMPLIFIER
The transmitter synthesizer audio input line is fed to
U601A. U601A is configured as a unity gain op-amp. Re-
sistor R601 sets the 600 ohm input impedance of this ampli-
fier. (NOTE: Data for digital modulation is fed to the
synthesizer through the audio input line).
The amplifier output is split into two components and fed
to two variable resistors VR601 and VR602. VR601 sets the
level in the low frequency audio path and VR602 sets the
level in the high frequency audio path. (There is no clear
break between the low and high frequency ranges. All voice
frequencies are within the high frequency range. The low
frequency range contains low frequency data components).
The wiper of VR601 (low frequency path) connects to
the input of U601B, the pre-modulation integrator. U601B
performs the function of a low-pass filter and integrator. The
integrator output is summed with the PLL control voltage at
the input of loop buffer amplifier U501B. This integrated
audio signal phase modulates the VCO. The combination of
pre-integration and phase modulation is equivalent to fre-
quency modulation.
The wiper of VR602 (high frequency path) is connected
to the modulation input of the VCO through C16.
VOLTAGE REGULATORS
U301 and U303 are monolithic voltage regulators (+5
Vdc and -5 Vdc respectively). These two voltages are used
by synthesizer circuitry. The +5 V regulator output is also
used as a voltage reference for the +8 Vdc discrete regulator
circuit.
U302A, Q302 and associated circuitry comprise the +8
volt regulator. Most module circuitry is powered from the +8
volt line. The regulator is optimized for especially low noise
performance. This is critical because the low noise VCO is
powered by the +8 volt line.
The +8 Vdc line also feeds the +4 Vdc regulator, U302B
and associated resistors. The +4 Vdc regulator provides a
bias voltage for several op-amps in the module.
Figure 1 - Block Diagram
LBI-38671
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