Page 16
Epson Research and Development
Vancouver Design Center
S1D13513
S5U13513P00C100 Evaluation Board User Manual
X78A-G-003-01
Issue Date: 2010/09/06
Revision 1.1
4.4.3 Direct Host Bus Interface Support
The S1D13513 Display Controller directly supports many host bus interfaces. For detailed
S1D13513 pin mapping, refer to the
S1D13513 Hardware Functional Specification
,
document number X78B-A-001-xx.
All S1D13513 host interface pins are available on connectors H2 and H3 which allow the
S5U13513P00C100 to be connected to a variety of development platforms. However,
connectors H2 and H3 are not populated on the S5U13513P00C100 evaluation board.
If connectors H2 and H3 are added, all host interface signals must match HVDD1 of the
S1D13513. For the maximum/minimum values of the voltages, refer to the
S1D13513
Hardware Functional Specification
, document number X78B-A-001-xx.
The following diagram shows the location of the host bus connectors, H2 and H3. They are
0.1x0.1” 34-pin headers (17x2).
Figure 4-1: Host Bus Connector Locations (H2 and H3)
For the pinout of connectors H2 and H3, see “Schematic Diagrams” on page 24.
H2
H3
