16-7
Seiko Epson Corporation
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
Figure 16.4.2.2 Master Mode Data Transmission Flowchart
Data transmission using DMA
By setting the I2C_
n
TBEDMAEN.TBEDMAEN
x
bit to 1 (DMA transfer request enabled), a DMA
transfer request is sent to the DMA controller and transmit data is transferred from the specified
memory to the I2C_
n
TXD register via DMA Ch.
x
when the I2C_
n
INTF.TBEIF bit is set to 1 (transmit
buffer empty).
This automates the data sending procedure from Steps 5, 6, and 8 described above.
The transfer source/destination and control data must be set for the DMA controller and the
relevant DMA channel must be enabled to start a DMA transfer in advance so that transmit data
will be transferred to the I2C_
n
TXD register. F
or more information on DMA, refer to the “DMA
Controller” chapte
r.
Table 16.4.2.1 DMA Data Structure Configuration Example (for Data Transmission)
Item
Setting example
End pointer
Transfer source
Memory address in which the last transmit data is stored
Transfer destination
I2C_
n
TXD register address
Control data
dst_inc
0x3 (no increment)
dst_size
0x0 (byte)
src_inc
0x0 (+1)
src_size
0x0 (byte)
R_power
0x0 (arbitrated for every transfer)
n_minus_1
Number of transfer data
cycle_ctrl
0x1 (basic transfer)
Data transmission
Write slave address and WRITE (0) to
the I2C_
n
TXD register
Write 1 to the I2C_
n
CTL.TXSTOP bit
Write 1 to the I2C_
n
CTL.TXSTART bit
I2C_
n
INTF.NACKIF = 1 ?
Last data sent?
Retry?
Write data to the I2C_
n
TXD register
Wait for an interrupt request
(I2C_
n
INTF.TBEIF = 1)
End
Wait for an interrupt request
(I2C_
n
INTF.STOPIF = 1)
Wait for an interrupt request
(I2C_
n
INTF.TBEIF = 1 or I2C_
n
INTF.NACKIF = 1)
No
Yes
Yes
No
No
Yes
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