REV.-A
2.4.3.1 Initialization
When the reset signal is input, the printer is initialized as follows:
CPU
GATE
.— ————————
. .
1
i
I
Clears the ports using hardware resetting.
I
Clears all port outputs. Executes the program from
●
Sets the print head data to High-Z(the high
address OH.
I
1
impedance state).
●
Sets the BUSY signal HIGH.
I
1
1
Sets up the
ports. Initializes the CR and PF
Receives the phase data for the motors from the
motors.
CPU, and holds the CR and LF motors.
1
— — —— — ——— — — — — —-
Clears the memory. Sends the ACK signal to the
host computer via the interface.
I
Performs carriage home position seek.
— — — — — — — — — — —
1
Initializes the gate array.
I
Initialized (the instruction codes are set).
i
(Outputs the instructions to the gate array.)
I
—
- —
I
i
Reads the DIP switch settings on the optional
I
Reads the DIP switch settings on the optional
board upon receiving the instruction code.
board if the board is installed.
(XX02H is read.)
J
Checks whether the paper is set or not. Sends the
Controls the paper end signal of the interface and
I
result to the gate array.
I
l a m p o n
t h e
I
— — — — — - — — — — — — — — - — — — — — — -
Is this self-test printing or hex-
adecimal dump mode?
Y
tors the switch signals from
I
Select either the self-test
printing or the hexadecimal
dump mode.
Enters the interface waiting state (main routine for
Entars tha interface
data waiting state.
I
data processing).
I
●
Sets the
BUSY signal LOW.
— — — — — —
Fig. 2-14. Initialization
2-19
Flow
Содержание LX-HOO
Страница 1: ...LX HOO TECHNICAL MANUAL EPSON ...
Страница 123: ...REV A Fig 6 2 LX 800 Lubrication Points 6 3 ...
Страница 138: ...A 2 SCHEMATICS AND DIAGRAMS cl f Fig A 1 3 LCPNL Circuit Diagram A 1 3 ...
Страница 139: ... 5 W SW R70 W 7 w ii 4 3 4 2 0s 3 5 R34 cm 3 7 Z03 C17 x I SW2 1 Swl B3S CNI Fig A 15 ROCX Board Component Layout A 1 7 ...
Страница 142: ...Printad in Japan 87 07 6 ...