A.1.2
Gate Array
The
gate array intergrates many CPU peripheral functions, so that fewer chips are required
to construct a complete system. Figure A-6 shows the
pin diagram, and Figure A-7 shows
the
block diagram. The details of the
are given in section 2.4.2.
2
63
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–
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IN 1
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STRB
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1
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~ - - B U S Y
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- -
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Fig. A-6.
Pin Diagram
A-7
Содержание LX-HOO
Страница 1: ...LX HOO TECHNICAL MANUAL EPSON ...
Страница 123: ...REV A Fig 6 2 LX 800 Lubrication Points 6 3 ...
Страница 138: ...A 2 SCHEMATICS AND DIAGRAMS cl f Fig A 1 3 LCPNL Circuit Diagram A 1 3 ...
Страница 139: ... 5 W SW R70 W 7 w ii 4 3 4 2 0s 3 5 R34 cm 3 7 Z03 C17 x I SW2 1 Swl B3S CNI Fig A 15 ROCX Board Component Layout A 1 7 ...
Страница 142: ...Printad in Japan 87 07 6 ...