
The addresses for the page register are as below.
Table 6-10: I/O Hex Address
Address generation for the DMA channels is as below.
Table 6-11: DMA Channel 3 Through 0
Note: To generate the addressing signal “byte high enable” (BHE),
invert address line A0.
Table 6-12: DMA Channels 7 Through 5
Note: The BHE and A0 addressing signals are forced to a logical 0.
DMA channel addresses do not increase or decrease through page
boundaries 64KB for channels 0 through 3 and 128KB for channels 5
through 7).
22
Chapter 6: Appendix
Содержание Apex 286/12
Страница 1: ...TECH 1234 12MHz 286 SYSTEM U ser s Manual ...
Страница 15: ...Chapter 1 System Overview ...
Страница 38: ...Chapter 2 Setting Up Your System ...
Страница 50: ...Figure 2 11 1 5 MB Total Onboard System Memory 12 Chapter 2 Setting Up Your System ...
Страница 52: ...Figure 2 14 3MB Total Onboard System Memory 14 Chapter 2 Setting Up Your System ...
Страница 53: ...Figure 2 15 4MB Total Onboard System Memory Chapter 2 Setting Up Your System 15 ...
Страница 54: ...Figure 2 16 5MB Total Onboard System Memory 16 Chapter 2 Setting Up Your System ...
Страница 59: ...Operating Your System ...
Страница 78: ...Chapter 4 Keyboard ...
Страница 88: ...Troubleshooting ...
Страница 96: ...Appendix ...
Страница 102: ...Figure 6 6 Connecting a Floppy Disk Drive Figure 6 7 Connecting a Floppy Disk Drive to an FDC Card 6 Chapter 6 Appendix ...
Страница 104: ...Figure 6 10 Connecting a Hard Disk Drive Figure 6 11 Connecting a Hard Disk to an HDC Card 8 Chapter 6 Appendix ...
Страница 121: ...Glossary ...