5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
Short to GND to
enter bootloader
mode during power up
CTRLMCU_RTCK
TCK_IN
CTRLMCU_TCK_SW CLK
CTRLMCU_TDI
CTRLMCU_TMS_SW DIO
#RESET_IN
TDO_SW O_IN
CTRLMCU_TDO_SW D
#TRST_OUT
CTRLMCU_#TRST
TDI_OUT
TMS_OUT
TCK_OUT
#TRST_IN
TDI_IN
TMS_IN
GND
GND
GND
GND
GND
GNDGND
3V3
3V3
3V3
3V3
3V3
3V3
3V3
DEBUG_#TRST_OUT
(p 13)
DEBUG_TDI_OUT
(p 13)
DEBUG_TMS_SW DIO_OUT
(p 13)
DEBUG_TCK_SW CLK_OUT
(p 13)
CTRLMCU_SPI_#CS
(p 12)
AEM_VMCU_ENABLE
(p 20)
CTRLMCU_SPI_SCK
(p 12)
CTRLMCU_DEBUG_#RESET
(p 12)
CTRLMCU_SPI_MOSI
(p 12)
CTRLMCU_FSMC_#ADV
(p 9)
CTRLMCU_I2C_SDA
(p 12,17,18,20)
CTRLMCU_I2C_SCL
(p 12,17,18,20)
DEBUG_DH_SW _ENABLE
(p 13)
DEBUG_MCU_SW _ENABLE
(p 13)
DEBUG_#RESET
(p 13)
CTRLMCU_JTAG_TDO (p 10)
EEPROM_W P
(p 12,15,17,18)
DEBUG_#TRST_IN
(p 13)
DEBUG_TDI_IN
(p 13)
DEBUG_TMS_SW DIO_IN
(p 13)
DEBUG_TCK_SW CLK_IN
(p 13)
AEM_SENSE_VOLTAGE
(p 21)
DEBUG_BUF_#OE
(p 13)
DEBUG_TMS_SW DIO_#OE
(p 13)
DEBUG_TDO_SW O_IN
(p 13)
CTRLMCU_SPI_MISO
(p 12)
DEBUG_#RESET_IN
(p 13)
AEM_SENSE_CURRENT_RANGE1
(p 20,21)
DEBUG_EXT_VDD_TARGET
(p 13)
AEM_SENSE_CURRENT_RANGE2
(p 20,21)
DEBUG_EXT_CABLE_ATTACH
(p 13)
USBDM
(p 19)
USBDP
(p 19)
CTRLMCU_FPGA_#INT
(p 7)
CTRLMCU_JTAG_TCK (p 10)
CTRLMCU_JTAG_TMS (p 10)
CTRLMCU_JTAG_TDI
(p 10)
AEM_AUX_SENSE_VOLTAGE
(p 21)
CTRLMCU_JTAG_#TRST (p 10)
MCU_OSC_TEST
(p 17,18)
CTRLMCU_SRAM_#ZZ
(p 6)
CTRLMCU_RS232_B_TX
(p 3,16,18)
CTRLMCU_RS232_B_RX
(p 3,16,18)
Size
Designed:
Revision
Sheet
of
Approved:
Sheet Created Date
Sheet Modified Date
Document number
Schematic Title
Design Created Date:
BOM Doc No:
Page Title
C
BRD3200C
Tuesday, January 19, 2010
11
21
A3
JNO
JNO
EFM32 Development Kit
<Cage Code>
Saturday, March 21, 2009
W ednesday, December 03, 2008
TOP
<Schematic Path>
Control MCU
Size
Designed:
Revision
Sheet
of
Approved:
Sheet Created Date
Sheet Modified Date
Document number
Schematic Title
Design Created Date:
BOM Doc No:
Page Title
C
BRD3200C
Tuesday, January 19, 2010
11
21
A3
JNO
JNO
EFM32 Development Kit
<Cage Code>
Saturday, March 21, 2009
W ednesday, December 03, 2008
TOP
<Schematic Path>
Control MCU
Size
Designed:
Revision
Sheet
of
Approved:
Sheet Created Date
Sheet Modified Date
Document number
Schematic Title
Design Created Date:
BOM Doc No:
Page Title
C
BRD3200C
Tuesday, January 19, 2010
11
21
A3
JNO
JNO
EFM32 Development Kit
<Cage Code>
Saturday, March 21, 2009
W ednesday, December 03, 2008
TOP
<Schematic Path>
Control MCU
LED77
YELLOW
LED77
YELLOW
2
1
PORT A
PORT B
PORT C
U17A
Control MCU
PORT A
PORT B
PORT C
U17A
Control MCU
PA0 / WKUP / USART2_CTS / ADC123_IN0 / TIM2_CH1_ETR / TIM5_CH1 / TIM8_ETR
G2
PA1 / USART2_RTS / ADC123_IN1 / TIM5_CH2 / TIM2_CH2
H2
PA2 / USART2_TX / ADC123_IN2 / TIM5_CH3 / TIM2_CH3
J2
PA3 / USART2_RX / ADC123_IN3 / TIM5_CH4 / TIM2_CH4
K2
PA4 / SPI1_NSS / DAC_OUT1 / USART2_CK / ADC12_IN4
G3
PA5 / SPI1_SCK / DAC_OUT2 / ADC12_IN5
H3
PA6 / SPI1_MISO / TIM8_BKIN / ADC12_IN6 / TIM3_CH1 [TIM1_BKIN]
J3
PA7 / SPI1_MOSI / TIM8_CH1N / ADC12_IN7 / TIM3_CH2 [TIM1_CH1N]
K3
PA8 / USART1_CK / TIM1_CH1 / MCO
D9
PA9 / USART1_TX / TIM1_CH2
C9
PA10 / USART1_RX / TIM1_CH3
D10
PA11 / USART1_CTS / CANRX / TIM1_CH4 / USBDM
C10
PA12 / USART1_RTS / CANTX / TIM1_ETR / USBDP
B10
PA13 / JTMS-SWDIO
A10
PA14 / JTCK-SWCLK
A9
PA15 / JTDI
A8
PB0 / ADC12_IN8 / TIM3_CH3 / TIM8_CH2N
J4
PB1 / ADC12_IN9 / TIM3_CH4 / TIM8_CH3N
K4
PB2 / BOOT1
G5
PB3 / JTDO / TRACESWO / SPI3_SCK / I2S3_CK [TIM2_CH2 / SPI1_SCK]
A7
PB4 / JNTRST / SPI3_MISO [TIM3_CH2 / SPI1_MISO]
A6
PB5 / I2C1_SMBAI / SPI3_MOSI / I2S3_SD [TIM3_CH2 / SPI1_MOSI]
C5
PB6 / I2C1_SCL / TIM4_CH1 [USART1_TX]
B5
PB7 / I2C1_SDA / FSMC_NADV / TIM4_CH2 [USART1_RX]
A5
PB8 / TIM4_CH3 / SDIO_D4 [I2C1_SCL / CANRX]
B4
PB9 / TIM4_CH4 / SDIO_D5 [I2C1_SDA / CANTX ]
A4
PB10 / I2C2_SCL / USART3_TX [TIM2_CH3]
J7
PB11 / I2C2_SDA / USART3_RX [TIM2_CH4]
K7
PB12 / SPI2_NSS / I2S2_WS / I2C2_SMBAI / USART3_CK / TIM1_BKIN
K8
PB13 / SPI2_SCK / I2S2_CK / USART3_CTS / TIM1_CH1N
J8
PB14 / SPI2_MISO / TIM1_CH2N / USART3_RTS
H8
PB15 / SPI2_MOSI / I2S2_SD / TIM1_CH3N
G8
PC0 / ADC123_IN10
F1
PC1 / ADC123_IN11
F2
PC2 / ADC123_IN12
E2
PC3 / ADC123_IN13
F3
PC4 / ADC12_IN14
G4
PC5 / ADC12_IN15
H4
PC6 / I2S2_MCK / TIM8_CH1 / SDIO_D6 [TIM3_CH1]
F10
PC7 / I2S3_MCK / TIM8_CH2 / SDIO_D7 [TIM3_CH2]
E10
PC8 / TIM8_CH3 / SDIO_D0 [TIM3_CH3]
F9
PC9 / TIM8_CH4 / SDIO_D1 [TIM3_CH4]
E9
PC10 / UART4_TX / SDIO_D2 [USART3_TX]
B9
PC11 / UART4_RX / SDIO_D3 [USART3_RX]
B8
PC12 / UART5_TX / SDIO_CK [USART3_CK]
C8
PC13 / TAMPER-RTC
A2
PC14 / OSC32_IN
A1
PC15 / OSC32_OUT
B1
R298
0R
R298
0R
R84
100K
NM
R84
100K
NM
R86
100K
NM
R86
100K
NM
LED78
YELLOW
LED78
YELLOW
2
1
R296
0R
R296
0R
R90
100K
NM
R90
100K
NM
R88
100K
NM
R88
100K
NM
R359
0R
R359
0R
C89
18P
C89
18P
R83
100K
NM
R83
100K
NM
P5
2X10 2.54MM
NM
P5
2X10 2.54MM
NM
1
2
4
8
6
10
3
5
9
7
12
13
14
11
15
16
17
19
18
20
R81 22R
R81 22R
R297
0R
R297
0R
R87
100K
NM
R87
100K
NM
LED75
YELLOW
LED75
YELLOW
2
1
TP157
TP157
C88
18P
C88
18P
R79 1K5
R79 1K5
RP1
2K2
RP1
2K2
1
2
3
4
5
6
7
8
R85
100K
NM
R85
100K
NM
LED76
YELLOW
LED76
YELLOW
2
1
R82
100K
NM
R82
100K
NM
R80 22R
R80 22R
R89
100K
NM
R89
100K
NM
electronic components distributor