Preliminary
...the world's most energy friendly microcontrollers
2010-04-09 - t0005_1.10
19
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10.2.9 BC_DISPLAY_CTRL - Display control register
Offset
Bit Position
0x010
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0
0
Access
RW
RW
Name
POWER_ENABLE
RESET
Bit
Name
Reset
Access
Description
15:2
Reserved
To ensure compatibility with future devices, always write bits to 0.
1
POWER_ENABLE
0
RW
Display power enable
Set this bit to enable power to the TFT display
0
RESET
0
RW
Display reset
Set this bit to put the TFT display into reset mode
10.2.10 BC_EBI_CFG - EBI configuration register
Offset
Bit Position
0x012
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0x0
Access
RW
Name
EBI_CFG
Bit
Name
Reset
Access
Description
15:2
Reserved
To ensure compatibility with future devices, always write bits to 0.
1:0
EBI_CFG
0x0
RW
EBI configuration register
Set this register to configure the BC EBI interface to match the configuration in your application
Value
Mode
Description
0
EBI_16_16
The BC EBI is in a 16 address bits and 16 data bits configuration
1
EBI_8_8
The BC EBI is in a 8 address bits and 8 data bits configuration
2
EBI_24_8
The BC EBI is in a 24 address bits and 8 data bits configuration
10.2.11 BC_BUS_CFG - BUS configuration register
Offset
Bit Position
0x014
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0x0
Access
RW
Name
BUS_CFG
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