12.21.2
Circuit
The Circuit diagram is shown on Drawing No. BE225.
12.21.3
Circuit Description
The input transformer receives a 50V supply at 50 or 60Hz and has a centre
tapped secondary, the overall ratio being 1:1.04. The centre point of the secondary
winding is connected to the 0 V line. From the secondary winding D1 and D2 are
connected as bi-phase rectifiers to provide the main positive supply, C3 being the
reservoir capacitor. D3 and D4 provide a similar negative supply C4 being the
reservoir capacitor. D5, D7, C1, C5 are connected as a voltage doubling circuit,
using one half of the transformer secondary, to provide an auxiliary low current
positive supply. R1 serves to limit the peak current and C5 is returned to the
positive end of C3 to avoid the use of a higher voltage capacitor. D6, D8, C2, C6,
R2 are similarly connected to the other half of the secondary of the transformer to
provide an auxiliary low current negative supply.
The positive stabiliser contains VT2 and VT4 in parallel as a series unit,
separate emitter resistors R8 and R9 being provided to equalise the currents. A
fraction of the output determined by R22, AOT1, AOT2, R23 is fed to the base of
VT8, the emitter of which is held by a 6.8V zener diode D11 shunted by C13, to
reduce its noise and impedance. The collector of VT8 is fed through a load resistor
R21 from a point approximately 9 V positive with respect to the +20V rail obtained
by a 9.1V zener diode D10 which is fed through R15 from the auxiliary positive
supply in which extra smoothing is provided by R13, C10. VT8 therefore operates
as a high gain d.c. amplifier of the difference between a fraction of the output and
the reference voltage provided by D11. The temperature coefficients of VT8 and
D11, both of which are prior to the high gain, cancel one another. The collector of
VT8 is connected to the base of an emitter follower VT1, the emitter of which is
connected to the bases of VT2 and VT4. In order to realise an extremely low ripple
voltage at the output, a fraction of the ripple across the series transistors is obtained
by AOT4 and R7, and this fraction is coupled to the base of VT8 by C14. AOT1 and
AOT2 are selected to give a precise output voltage of 20.0, and AOT4 is then
selected for minimum ripple.
The negative stabiliser uses the +20V supply as its reference instead of a
zener diode. An emitter follower VT7 has its base held at approximately 0V by the
resistive chain R17, R18, R19, AOT13 connected between the +20V and – 20V
rails. The emitter of VT7 is connected to the base of the high gain amplifier stage
VT6. This in turn is connected to an emitter follower VT3 which controls the base of
the series transistor VT5. VT6 collector is fed from the auxiliary negative supply in
the same way as VT8 collector is fed from the auxiliary positive supply. The
collector of VT7 is fed from D11 solely because this is a point at a suitable potential.
AOT3 is selected to give the precise output voltage, and AOT5, which controls the
ripple fed to the base of VT7 via C12, is selected for minimum ripple at the negative
output. R3 and R5 serve to limit current in overload conditions. The temperature
coefficients of VT6 and VT7 cancel one another.
12.21.4
Output
The rated output is 75mA from the +20V rail and 120mA from the –20V rail.
The noise output varies with supply voltage but is of the order of 5
µ
V r.m.s. over the
audio bandwidth measured flat.
