provided that BT2 is switched off. When a control signal is fed to the base of VT2 to
turn it on, R8 (1k
Ω
) is shunted across the collector load introducing about 20dB of
loss. The d.c. coupled virtual earth amplifier VT5, VT6 has a feedback resistor R20
equal in value to the input resistor R10 and the overall gain is therefore unity.
The auxiliary input A is connected through R11, R12 and R15 to the input
capacitor C3 of the virtual earth amplifier. When the control signal at terminal 1 is
such as to hold VT2 in the “off” condition, the control signal at terminal 2 is such as
to hold VT3 VT4 in the conducting condition. In this condition R11 with VT3 and
R12 with VT4 act as a two-stage attenuator which has sufficient loss to prevent a
signal at the auxiliary input from entering the main channel.
When the control signals on terminals 1 and 2 are interchanged, VT2 is
turned on and provides about 20dB of quieting in the main channel, VT3 and VT4
are simultaneously turned off thereby removing the attenuation and leaving R11 +
R12 + R15 (a total of about 20k
Ω
) feeding signal from the auxiliary input to the
virtual earth amplifier. This provides a path with unity gain from auxiliary input to the
output.
12.14.4
Output
The output is d.c. coupled and is at a potential of about 3.3V. It will supply at
least 1.4V r.m.s into a load of 3k
Ω
.
12.15 Amplifier Q Power Unit
12.15.1
Purpose
This unit supplies the necessary power for two Amplifiers Q.
12.15.2
Circuit
The circuit diagram is shown on Drawing No. BE217.
12.15.3
Circuit Description
This unit receives a 50V mains frequency supply from the main step-down
transformer in the Main Power Unit. The centre tap of this supply is earthed in the
Main Power Unit and this is carried through as the 0V line of the output. Three pairs
of rectifiers are connected in separate bi-phase circuits. D1 and D2 with a current
limiting resistor R1 and reservoir capacitor C3 provide a low current supply at –26V.
D3, D4, R2 and C2 provide a similar supply at +26V.
The main supply is rectified by high current diodes D5 and D6 and fed
through R3 to the reservoir capacitor C1 which is not on the printed board. From
here the current is fed through R7 and R8 in parallel and a series stabiliser
transistor VT2 which is also not on the printed board. The base of this is held by an
emitter follower VY1. The base of VT1 is held at about +18V by a pair of zener
diodes D7 and D8 which are supplied from the +26V line through a smoothing circuit
R5, C4 and a series resistor R6. Capacitor C5 is included to prevent r.f. oscillation.
12.15.4
Output
The low current outputs will each supply about 4mA.
