Embedian, Inc.
114
SMARC-iMX8MM Computer on Module User’s Manual
v. 1.2
SMARC
Edge
Finger
NXP
i.MX8M
Mini
CPU
Type
Description
Pin#
Pin
Name
Ball
Mode
Signal
Name
P1
SMB_ALERT_1V8#
Not
used
P2
GND
P
Ground
P3
B16
MIPI_CSI_CLK_P
I
CSI1
differential
clock
inputs
P4
CSI1_CK
‐
A16
MIPI_CSI_CLK_N
I
CSI1
differential
clock
inputs
P5
GBE1_SDP
Not
used
P6
GBE0_SDP
Not
used
P7
C
B14
MIPI_CSI_D0_P
I
CSI1
differential
data
inputs
0
(positive)
P8
CSI1_RX0
‐
A14
MIPI_CSI_D0_N
I
CSI1
differential
data
input
0
(negative)
P9
GND
P
Ground
P10
C
B15
MIPI_CSI_D1_P
I
CSI1
differential
data
input
1
(positive)
P11
CSI1_RX1
‐
A15
MIPI_CSI_D1_N
I
CSI1
differential
data
inputs
1
(negative)
P12
GND
P
Ground
P13
C
B17
MIPI_CSI_D2_P
CSI1
differential
data
inputs
2
(positive)
P14
CSI1_RX2
‐
A17
MIPI_CSI_D2_N
CSI1
differential
data
inputs
2
(negative)
P15
GND
P
Ground
P16
C
B18
MIPI_CSI_D3_P
CSI1
differential
data
inputs
3
(positive)
P17
CSI1_RX3
‐
A18
MIPI_CSI_D3_N
CSI1
differential
data
inputs
3
(negative)
P18
GND
P
Ground