V
T
ABLE OF
C
ONTENTS
1 Product Overview............................................................................................... 1
Key Components ................................................................................................. 2
VIA Eden ULV 1.0GHz NanoBGA2 Processor ................................ 2
VIA VX855 Media System Processor..................................................... 2
Mainboard Specifications ................................................................................ 3
EPIA-P720 Layout ................................................................................................ 4
Top Side .............................................................................................................. 4
Bottom Side....................................................................................................... 5
P720-A I/O Module Layout ............................................................................ 6
Front View......................................................................................................... 6
Top View ............................................................................................................ 6
Bottom View..................................................................................................... 6
Development Kit Accessories ........................................................................ 7
DC-In Cable....................................................................................................... 7
Power Brick........................................................................................................ 7
2 Onboard Connectors, Slots and Pin Headers....................................... 9
Top Side Connectors .......................................................................................10
VIA Eden ULV 1.0GHz with a Fanless Heatsink..................................10
System Fan connector: FAN1 ................................................................10
DC-In Power connector: PWR1 ............................................................11
Serial ATA Power connector: PWR2...................................................11
Serial ATA connector: SATA1 .................................................................12
HDMI port connector: HDMI1 ..............................................................12
IDE pin header: IDE1..................................................................................13
Ethernet LAN pin header: CN3.............................................................14
VGA and USB pin header: VGA_USB1 ............................................15
Front Audio pin header: CN1................................................................16
USB pin header: CN2 .................................................................................17
Front Panel and PS/2 KBMS pin header: CN4...............................18
LPC, SMBus and Digital I/O pin header: CN5................................19
UART/VCP port 2: J1 ..................................................................................20
Bottom Side Connector..................................................................................21
UART/VCP port 1: J2 ..................................................................................21
LVDS Panel connector: LVDS1..............................................................22
External Battery: BAT1................................................................................23
Memory Module Installation...................................................................24
Содержание EPIA-P720
Страница 1: ...user manual EPIA P720 Pico ITX Mainboard Revision 1 00 100 09162009 1423 ...
Страница 10: ...1 1 Product Overview ...
Страница 17: ...8 ...
Страница 35: ...26 ...
Страница 36: ...27 3 Onboard Jumpers ...
Страница 39: ...30 ...
Страница 40: ...31 4 P720 A I O Module Installation ...
Страница 43: ...34 ...
Страница 44: ...35 5 BIOS Setup This chapter gives a detailed explanation of the BIOS setup functions ...
Страница 49: ...40 CPU CONFIGURATION CMPXCHG8B instruction support Settings Enabled Disabled ...
Страница 56: ...47 CHIPSET ACPI CONFIGURATION USB Device Wakeup Function Settings Disabled Enabled ...
Страница 66: ...57 Interrupt 19 Capture Settings Disabled Enabled ...
Страница 72: ...63 Rank Interleave Settings Disabled Enabled Bank Address Scramble Settings Disabled Enabled ...
Страница 73: ...64 AGP P2P BRIDGE CONFIGURATION Primary Graphics Adapter Settings PCI AGP ...
Страница 74: ...65 V LINK PCI BUS CONFIGURATION DRDY Timing Settings Slowest Default Dynamic Clock Stop Control Settings DE ...
Страница 77: ...68 PCI Delay Transaction Settings Disabled Enabled WATCH DOG Settings Disabled Enabled ...
Страница 79: ...70 ...