21
B
OTTOM
S
IDE
C
ONNECTOR
UART/VCP port 1: J2
UART offers TTL level serial signal for the user to easily convert to
support RS232/RS422/RS485. Or, the user may use it as the VCP
for Video capture.
Pin VCP Signal
UART Signal
1
GND
GND
2
DVPSPCLK
-LPCRST
3
DVPSPD
-
4
VCPD7
CTS_0
5
VCPD6
RTS_0
6
VCPD5
DSR_0
7
VCPD4
DTR_0
8
VCPD3
SIN_0
9
VCPD2
SOUT_0
10
VCPD1
DCD_0
11
VCPD0
RI_0
12
+3.3V/+5V
Содержание EPIA-P720
Страница 1: ...user manual EPIA P720 Pico ITX Mainboard Revision 1 00 100 09162009 1423 ...
Страница 10: ...1 1 Product Overview ...
Страница 17: ...8 ...
Страница 35: ...26 ...
Страница 36: ...27 3 Onboard Jumpers ...
Страница 39: ...30 ...
Страница 40: ...31 4 P720 A I O Module Installation ...
Страница 43: ...34 ...
Страница 44: ...35 5 BIOS Setup This chapter gives a detailed explanation of the BIOS setup functions ...
Страница 49: ...40 CPU CONFIGURATION CMPXCHG8B instruction support Settings Enabled Disabled ...
Страница 56: ...47 CHIPSET ACPI CONFIGURATION USB Device Wakeup Function Settings Disabled Enabled ...
Страница 66: ...57 Interrupt 19 Capture Settings Disabled Enabled ...
Страница 72: ...63 Rank Interleave Settings Disabled Enabled Bank Address Scramble Settings Disabled Enabled ...
Страница 73: ...64 AGP P2P BRIDGE CONFIGURATION Primary Graphics Adapter Settings PCI AGP ...
Страница 74: ...65 V LINK PCI BUS CONFIGURATION DRDY Timing Settings Slowest Default Dynamic Clock Stop Control Settings DE ...
Страница 77: ...68 PCI Delay Transaction Settings Disabled Enabled WATCH DOG Settings Disabled Enabled ...
Страница 79: ...70 ...