22
LVDS Panel connector: LVDS1
The single-channel LVDS connector allows you to connect the
panel’s LVDS cable directly to support LVDS panel.
Pin
Signal
Pin
Signal
1
LVDSD0-
2
LVDSD1-
3
4
5
GND
6
GND
7
Panel_VDD
8
LVDSD2-
9
Panel_VDD
10
11
LCD1_DATA
12
GND
13
LCD1_CLK
14
15
GND
16
LVDSCLK-
17
Back Light_VDD
18
GND
19
Back Light_VDD
20
-
21
BL_ENABLE
22
-
23
DIMMING
24
GND
Содержание EPIA-P720
Страница 1: ...user manual EPIA P720 Pico ITX Mainboard Revision 1 00 100 09162009 1423 ...
Страница 10: ...1 1 Product Overview ...
Страница 17: ...8 ...
Страница 35: ...26 ...
Страница 36: ...27 3 Onboard Jumpers ...
Страница 39: ...30 ...
Страница 40: ...31 4 P720 A I O Module Installation ...
Страница 43: ...34 ...
Страница 44: ...35 5 BIOS Setup This chapter gives a detailed explanation of the BIOS setup functions ...
Страница 49: ...40 CPU CONFIGURATION CMPXCHG8B instruction support Settings Enabled Disabled ...
Страница 56: ...47 CHIPSET ACPI CONFIGURATION USB Device Wakeup Function Settings Disabled Enabled ...
Страница 66: ...57 Interrupt 19 Capture Settings Disabled Enabled ...
Страница 72: ...63 Rank Interleave Settings Disabled Enabled Bank Address Scramble Settings Disabled Enabled ...
Страница 73: ...64 AGP P2P BRIDGE CONFIGURATION Primary Graphics Adapter Settings PCI AGP ...
Страница 74: ...65 V LINK PCI BUS CONFIGURATION DRDY Timing Settings Slowest Default Dynamic Clock Stop Control Settings DE ...
Страница 77: ...68 PCI Delay Transaction Settings Disabled Enabled WATCH DOG Settings Disabled Enabled ...
Страница 79: ...70 ...