3
M
AINBOARD
S
PECIFICATIONS
CPU
VIA Eden ULV 1.0 GHz NanoBGA2 processor
• NanoBGA2 package
• 400 MHz Front Side Bus
Chipset
VIA VX855 All-in-One System Processor
Graphics
Integrated VIA Chrome9
TM
HCM DX9 with MPEG-2/4
Accelerators
System Memory
One DDR2 800/667 SODIMM slot (up to 2 GB)
Onboard Storage
One UltraDMA 133/100/66/33 44-pin IDE connector
One SATA 3Gb/s connector
Audio
VIA VT1708B High Definition Audio Codec
LAN
One VIA VT6122 Gigabit Ethernet controller
Onboard I/O
Connectors
One Audio pin connector for Line-out, Line-in and Mic-in
One Single-channel LVDS connector (5V/3V)
One LPC pin connector
One SMBus pin connector
One DIO pin connector(4 GPI & 4 GPO)
Two UART port / VCP pin header
One CPU fan connector
One PS2 mouse/keyboard pin header
One USB pin header
One Front panel pin header
One Backlight control pin header
One SATA power connector
One +12V DC-in 2-pin connector
I/O Ports
One HDMI port
One VGA port
One GigaLAN port
Two USB ports
System Monitoring
and Management
Wake-On-LAN and Keyboard Power-on
RTC Timer
Watch Dog Timer
System power management, AC power failure
BIOS
AMI BIOS with 4Mbit LPC flash memory
Operating System
Windows XP/CE/XPe and Linux
Operating
Environment
Temperature: 0
°
C up to 60
°
C
Humidity: 0% ~ 95% (relative humidity; non-
condensing)
Compliance
CE/FCC/BSMI/RoHS
Dimensions
135 mm(w) x 45 mm(H) x 131 mm (D)
Form Factor
Pico-ITX
10 cm x 7.2 cm
Содержание EPIA-P720
Страница 1: ...user manual EPIA P720 Pico ITX Mainboard Revision 1 00 100 09162009 1423 ...
Страница 10: ...1 1 Product Overview ...
Страница 17: ...8 ...
Страница 35: ...26 ...
Страница 36: ...27 3 Onboard Jumpers ...
Страница 39: ...30 ...
Страница 40: ...31 4 P720 A I O Module Installation ...
Страница 43: ...34 ...
Страница 44: ...35 5 BIOS Setup This chapter gives a detailed explanation of the BIOS setup functions ...
Страница 49: ...40 CPU CONFIGURATION CMPXCHG8B instruction support Settings Enabled Disabled ...
Страница 56: ...47 CHIPSET ACPI CONFIGURATION USB Device Wakeup Function Settings Disabled Enabled ...
Страница 66: ...57 Interrupt 19 Capture Settings Disabled Enabled ...
Страница 72: ...63 Rank Interleave Settings Disabled Enabled Bank Address Scramble Settings Disabled Enabled ...
Страница 73: ...64 AGP P2P BRIDGE CONFIGURATION Primary Graphics Adapter Settings PCI AGP ...
Страница 74: ...65 V LINK PCI BUS CONFIGURATION DRDY Timing Settings Slowest Default Dynamic Clock Stop Control Settings DE ...
Страница 77: ...68 PCI Delay Transaction Settings Disabled Enabled WATCH DOG Settings Disabled Enabled ...
Страница 79: ...70 ...