Embedded Solutions Page 11
#define IP429II_OE1_DEV2_U
0x56
// read from Device 2 port 2 upper half
#define IP429II_LD1_DEV2
0x58
// write to Device 2 TX port lower half
#define IP429II_LD2_DEV2
0x5a
// write to Device 2 TX port upper half
#define IP429II_CNTL_DEV2
0x5c
// write to Device 2 control word
#define IP429II_OE0_DEV3_L
0x60
// read from Device 3 port 1 lower half
#define IP429II_OE0_DEV3_U
0x62
// read from Device 3 port 1 upper half
#define IP429II_OE1_DEV3_L
0x64
// read from Device 3 port 2 lower half
#define IP429II_OE1_DEV3_U
0x66
// read from Device 3 port 2 upper half
#define IP429II_LD1_DEV3
0x68
// write to Device 3 TX port lower half
#define IP429II_LD2_DEV3
0x6a
// write to Device 3 TX port upper half
#define IP429II_CNTL_DEV3
0x6c
// write to Device 3 control word
#define IP429II_OE0_DEV4_L
0x70
// read from Device 4 port 1 lower half
#define IP429II_OE0_DEV4_U
0x72
// read from Device 4 port 1 upper half
#define IP429II_OE1_DEV4_L
0x74
// read from Device 4 port 2 lower half
#define IP429II_OE1_DEV4_U
0x76
// read from Device 4 port 2 upper half
#define IP429II_LD1_DEV4
0x78
// write to Device 4 TX port lower half
#define IP429II_LD2_DEV4
0x7a
// write to Device 4 TX port upper half
#define IP429II_CNTL_DEV4
0x7c
// write to Device 4 control word
FIGURE 1
IP-429 INTERNAL ADDRESS MAP
The address map provided is for the local decoding performed within the IP-429. The
addresses are all offsets from a base address. The carrier board where the IP is
installed provides the base address and controls the “naming of the bytes”. We refer to
the bytes following Motorola conventions i.e. upper is D15-D8 and lower is D7-D0.
When byte wide data is located on the lower byte then an odd address results or the
use of a word access using only the lower byte of data. We prefer the word oriented
approach because it is more consistent across platforms.
Please note the double wide registers for TX and RX data functions are located on LW
boundaries allowing for 32 bit read or write actions with carriers that support automatic
32
ó
16 conversion. All Dynamic Engineering carriers have this feature.
IP-429-II can have up to 4 of the encoder/decoder “chips” installed. The –1 version has
device 1 installed , -2 has both device 0 and device 1 and so forth. The names for the
decodes above have the chip number followed by the port within the chip and the
function. For example IP429II_OE1_DEV3_U is the upper half data read from chip 3
port 1. The OE, LD, CNTL etc. can be used as a guide to the IC function name when
comparing with the schematic or datasheet.
