Central Processor Unit,
Continued
Non-privileged software can access the GPRs and the processor
status word (bits <15:00> of the PSL). The IPRs and bits <31:16>
of the PSL can only be accessed by privileged software. The
IPRs are explicitly accessible only by the move-to-processor
register (MTPR) and the move-from-processor register (MFPR)
instructions which can be executed only while running in kernel
mode.
The KA49 implements 16 GPRs, as defined in the VAX
Architecture Reference Manual. These registers are used for
temporary storage, accumulators, and base and index registers
for addressing. These registers are denoted R0 - R15. The bits
of a register are numbered from the right <0> through <31>.
Table 1–2 describes the registers.
Table 1–2 General Purpose Register Descriptions
Register Register Name
Mnemonic Description
R15
Program Counter
PC
The PC contains the address of the next
instruction byte of the program.
R14
Stack Pointer
SP
The SP contains the address of the top of
the processor defined stack.
R13
Frame Pointer
FP
The call convention builds a data structure
on the stack called a stack frame. The FP
contains the address of the base of this data
structure.
R12
Argument Pointer
AP
The call convention uses a data structure
termed an argument. The AP contains the
address of the base of this data structure.
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