A/D MSB (bits 15-8): Base+1 (Read)
Bit:
7
6
5
4
3
2
1
0
Name:
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD15-8
A/D data bits 15 - 8; AD15 is the MSB.
A/D Low Channel: Base+2 (Read/Write)
Bit:
7
6
5
4
3
2
1
0
Name:
-
-
-
L4
L3
L2
L1
L0
L4-L0
The low channel number setting in the A/D channel scan range. Channel numbers range from 0 to 31
in single-ended mode. Writing to this register updates the current channel internal register.
A/D high Channel: Base+3 (Read/Write)
Bit:
7
6
5
4
3
2
1
0
Name:
-
-
-
H4
H3
H2
H1
H0
H4-H0
The high channel number setting in the A/D channel scan range. Channel numbers range from 0 to 31
in single-ended mode.
DAC LSB: Base+4 (Write)
Bit:
7
6
5
4
3
2
1
0
Name:
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
DA7-DA0 D/A data bits 7 - 0 for the channel currently being accessed. This register is a holding register.
Writing to it does not affect any D/A channel until the MSB is written. When the MSB is written (see
below, Base+5), the value written to that register, along with the value written to this register, are
simultaneously written to the D/A chip’s load register for the selected channel. See Base+5, write for
more details.
Diamond Systems Corporation
Poseidon User Manual
Page 57
