PNL-PSD Panel I/O Board for Poseidon CPU...........................................................106
Specifications..............................................................................................................115
CPU.......................................................................................................................115
Data Acquisition Circuitry......................................................................................115
Power Supply.........................................................................................................116
General..................................................................................................................116
Additional Information................................................................................................117
Appendix A. COM3/4/ADC IRQ Configuration for First Release Boards, Rev A1
.......................................................................................................................................118
Technical Support........................................................................................................119
Figures
Figure 1: Poseidon Functional Block Diagram..................................................................9
Figure 2: Poseidon Board Layout....................................................................................13
Figure 3: CN6 and CN7 Connectors................................................................................15
Figure 4: CN3 Connector.................................................................................................16
Figure 5: CN10 Connector...............................................................................................23
Figure 6: CN8 Connector.................................................................................................27
Figure 7: LCD Panel Connector.......................................................................................28
Figure 8: CN4 Connector.................................................................................................30
Figure 9: CN9 Connector.................................................................................................30
Figure 10: Serial ATA Connector.....................................................................................32
Figure 11: Jumper Block JP1...........................................................................................35
Figure 12: JP1 Settings...................................................................................................36
Figure 13: Base Address Configuration Example........................................................... 37
Figure 14: DMA Channel Selection.................................................................................37
Figure 15: Bus Width Configuration.................................................................................38
Figure 16: IRQ Selection Example..................................................................................39
Diamond Systems Corporation
Poseidon User Manual
Page 5
