dg_usb3.0_dev_ip_demo_instruction_en.doc
15 May 2015
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2 Xilinx
Xilinx
Xilinx
Xilinx Environment
Environment
Environment
Environment
For Xilinx USB3.0 Device-IP evaluation, user must arrange following environment.
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Xilinx evaluation board (SP-605 in this example)
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USB3.0 adapter board from DesignGateway [Part# AB07-USB3FMC]
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USB3.0 A to A cable attached with adapter board.
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Xilinx bit-file download tool (iMPACT) and serial console such as Teraterm.
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Host PC with USB3.0 port. (PCIe extension USB3.0 host card is also available, however, such PCIe
extension host card is sensitive to analog characteristics such as error occurrence at some PCIe slot
position. And PCIe extension host card cannot provide enough transfer performance when PCIe
interface is 1-lane and not GEN2 but GEN1 speed because GEN1 1-lane PCIe I/F limits its
performance to 2.5Gbps=200Mbyte/s at maximum.)
Figure
Figure
Figure
Figure 2
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2: Xilinx d
: Xilinx d
: Xilinx d
: Xilinx demo environment for USB3D
emo environment for USB3D
emo environment for USB3D
emo environment for USB3D----IP evaluation
IP evaluation
IP evaluation
IP evaluation
(Notes) Evaluation bit-file has 1-hour time limit operation after FPGA configuration.
