DFI WL9A3, Руководство пользователя, Страница: 19 / 23

17
Chapter 2
HARDWARE INSTALLATION
User's Manual | WL9A3
USB_2_3_OC# A44 I CMOS 3.3V Suspend/3.3V PU 10k to 3.3VSB Connect to Overcurrent of USB Power Switch USB over-current sense, USB channels 2 and 3. A pull-up for this
line shall be present on the Module. An open drain driver from a
USB current monitor on the Carrier Board may drive this line low. Do
not pull this line high on the Carrier Board.
USB_4_5_OC# B38 I CMOS 3.3V Suspend/3.3V PU 10k to 3.3VSB Connect to Overcurrent of USB Power Switch USB over-current sense, USB channels 4 and 5. A pull-up for this
line shall be present on the Module. An open drain driver from a
USB current monitor on the Carrier Board may drive this line low. Do
not pull this line high on the Carrier Board.
USB_6_7_OC# A38 I CMOS 3.3V Suspend/3.3V PU 10k to 3.3VSB Connect to Overcurrent of USB Power Switch USB over-current sense, USB channels 6 and 7. A pull-up for this
line shall be present on the Module. An open drain driver from a
USB current monitor on the Carrier Board may drive this line low. Do
not pull this line high on the Carrier Board.
US B23 O PCIE AC coupled on Module AC Coupling capaci-
tor
Connect 90Ω @100MHz Common Choke in series and
ESD suppressors to GND to USB connector
Additional transmit signal differential pairs for the SuperSpeed USB
data path.
USB_SSTX0- B22 AC Coupling capaci-
tor
US A23 I PCIE AC coupled off Modul Connect 90Ω @100MHz Common Choke in series and
ESD suppressors to GND to USB connector
Additional receive signal differential pairs for the SuperSpeed USB
data path.
USB_SSRX0- A22
US B26 O PCIE AC coupled on Module AC Coupling capaci-
tor
Connect 90Ω @100MHz Common Choke in series and
ESD suppressors to GND to USB connector
Additional transmit signal differential pairs for the SuperSpeed USB
data path.
USB_SSTX1- B25 AC Coupling capaci-
tor
US A26 I PCIE AC coupled off Modul Connect 90Ω @100MHz Common Choke in series and
ESD suppressors to GND to USB connector
Additional receive signal differential pairs for the SuperSpeed USB
data path.
USB_SSRX1- A25
USB0_HOST_
PRSNT
B48 I CMOS 3.3V Suspend/3.3V PD 20k to GND,
Reserved PU 10K
to 3.3V
Module USB client may detect the presence of a USB host. A high
value indicates that a host is present.
USB7_HOST_
PRSNT
B96 I CMOS 3.3V Suspend/3.3V PD 20k to GND,
Reserved PU 10K
to 3.3V
Module USB client may detect the presence of a USB host. A high
value indicates that a host is present.
LVDS Signals Descriptions
Signal Pin# Pin Type Pwr Rail /Tolerance WL9A3 Carrier Board Description
A71 O LVDS LVDS Connect to LVDS connector LVDS Channel A differential pairs
LVDS_A0- A72
A73 O LVDS LVDS Connect to LVDS connector
LVDS_A1- A74
A75 O LVDS LVDS Connect to LVDS connector
LVDS_A2- A76
A78 O LVDS LVDS Connect to LVDS connector
LVDS_A3- A79
LV A81 O LVDS LVDS Connect to LVDS connector LVDS Channel A differential clock
LVDS_A_CK- A82
LVDS_VDD_EN A77 O CMOS 3.3V / 3.3V Connect to enable control of LVDS panel power circuit LVDS panel power enable