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Award BIOS Setup Utility
DDR DRAM Clock
This field is used to select the clock speed of the DDR SDRAM
DIMM.
By SPD
The EEPROM on a DDR SDRAM DIMM has
SPD (Serial Presence Detect) data structure that
stores information about the module such as the
memory type, memory size, memory speed, etc.
When this option is selected, the system will run
according to the information in the EEPROM.
100 MHz
The
memory clock speed will run at 200MHz.
133 MHz
The
memory clock speed will run at 266MHz.
DRAM Timing
This field is used to select the timing of the DRAM.
By SPD
The EEPROM on a DIMM has SPD (Serial
Presence Detect) data structure that stores
information about the module such as the
memory type, memory size, memory speed, etc.
When this option is selected, the system will run
according to the information in the EEPROM.
Manual
It allows you to configure the 2 fields that follow
(SDRAM Cycle Length and Bank Interleave). The
system will run according to the settings in these
two fields.
DRAM CAS Latency
This field is used to select the clock cycle of the SDRAM CAS
latency time. The option selected specifies the time before
SDRAM starts a read command after receiving it.
Bank Interleave
The options are Enabled and Disabled.
Precharge to Active (Trp)
The options are 2T and 3T.
Active to Precharge (Tras)
The options are 5T and 6T.
Active to CMD (Trcd)
The options are 2T and 3T.
