Dave Embedded Systems ARM Cortex-A9 MPCore, Руководство по оборудованию

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A x e l H a r d w a r e M a n u a l v . 1 . 0 . 4
AXEL can mount three versions of the i.MX6 processor. The
following table shows a
comparison between the processor
models, highlighting the differences:
Processor #
cores Clock L2
cache DDR3 Graphics
acceleration IPU VPU SATA-
II
i.MX6 Solo 1 800 MHz
1 GHz 512
KB 32 bit @
400 MHz 3D : Vivante GC880
2D : Vivante GC320
Vector : N.A.
1x 1x N.A.
i.MX6 Dual 2 850 MHz
1 GHz
1.2 GHz 1 MB 64 bit @
533 MHz 3D : Vivante GC2000
2D : Vivante GC320
Vector : Vivante GC335
2x 2x Yes
i.MX6 Quad 4 850 MHz
1 GHz
1.2 GHz 1MB 64 bit @
533 MHz 3D : Vivante GC2000
2D : Vivante GC320
Vector : Vivante GC335
2x 2x Yes
Tab. 6 : i.MX6 comparison
3.2 DDR3 memory bank
DDR3 SDRAM memory bank is composed by 4x 16-bit width
chips resulting in a 64-bit combined width bank.
The following table reports the SDRAM specifications:
CPU connection Multi-mode DDR controller (MMDC)
Size min 512 MB
Size max 4 GB
Width 64 bit
Speed 533 MHz
Tab. 7 : DDR3 specifications
3.3 NOR flash bank
NOR flash is a Serial Peripheral Interface (SPI) device. This
device is connected to the eCSPI channel 5 and by default it
acts as boot memory.
The following table reports the NOR flash specifications:
CPU connection eCSPI channel 5
Size min 8 MByte
Size max 64 MByte
Chip select ECSPI5_SS0
April, 2015 19/78