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A x e l H a r d w a r e M a n u a l
v . 1 . 0 . 4
Pin name
Conn.
Pin
Function
Notes
LVDS0_CLK_N
J1.20
LVDS0 negative clock
signal
LVDS0_CLK_P
J1.22
LVDS0 positive clock
signal
7.4.1.2 LVDS1
The following table describes the interface signals:
Pin name
Conn.
Pin
Function
Notes
LVDS1_TX0_N
J3.52
LVDS1 negative data
0 signal
LVDS1_TX0_P
J3.54
LVDS1 positive data
0 signal
LVDS1_TX1_N
J3.58
LVDS1 negative data
1 signal
LVDS1_TX1_P
J3.60
LVDS1 positive data
1 signal
LVDS1_TX2_N
J3.64
LVDS1 negative data
2 signal
LVDS1_TX2_P
J3.66
LVDS1 positive data
2 signal
LVDS1_TX3_N
J3.76
LVDS1 negative data
3 signal
LVDS1_TX3_P
J3.78
LVDS1 positive data
3 signal
LVDS1_CLK_N
J3.70
LVDS1 negative clock
signal
LVDS1_CLK_P
J3.72
LVDS1 positive clock
signal
7.4.2
HDMI
The HDMI interface available on AXEL is based on the HDMI
transmitter and the HDMI 3D Tx PHY integrated into the i.MX6
SoC. The HDMI port supports the following standards and
features:
●
High-Definition Multimedia Interface Specification,
April, 2015
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