Data Translation DT9824, Руководство пользователя, Страница: 99 / 102

99
Index
A
A/D sample clock 50
A/D subsystem, specifications 82
A/D trigger 51
accessories 17
administrator privileges 27
analog input features
A/D sample clock 50
adding a digital input port to the channel list 50
channel list 49
channels 49
conversion modes 51
data format 52
data transfer 53
differential channels 33
error conditions 53
gain 50
input ranges 50
resolution 50
specifications 82
testing continuous operations 41
testing single-value operations 40
triggers 51
wiring voltage inputs 33
application wiring
digital inputs 35
digital outputs 36
voltage inputs 33
applications
Quick DataAcq 16
quickDAQ 16
B
base clock frequency 65
BaseClockFrequency 65
binary encoding 52
,
60
buffers 60
inprocess flush 60
C
C/C++ programs 16
cables
EP333 34
EP365 24
,
25
calibration 70
CGLDepth 61
channel list
for analog input channels 49
for digital input port 50
channel type
differential 61
single-ended 61
channel-gain list depth 61
channels
analog input 49
digital I/O 54
number of 61
clocks
base frequency 65
internal 65
maximum external clock divider 65
maximum throughput 65
minimum external clock divider 65
minimum throughput 65
connecting signals
digital inputs 35
digital outputs 36
voltage inputs 33
connecting to the host computer
directly 24
using a self-powered USB hub 25
connector J1 pin assignments 97
continuous analog input 59
continuous digital input 55
continuous wrap mode 52
conversion modes 51
digital I/O 55
single-value analog input 51
conversion rate 51
counter/timer
channels 61
clock sources 65
customer service 79
D
DAQ Adaptor for MATLAB 16
data encoding 60
data flow modes
continuous analog input 59
single-value 59
Index