Chapter 4
Signal Connections
PCI-MIO E Series User Manual
4-2
©
National Instruments Corporation
Figure 4-1. I/O Connector Pin Assignment for the PCI-MIO E Series Boards
1
2
3
4
5
6
7
8
9
10
35
36
37
38
39
40
41
42
43
44
11
12
13
14
15
16
17
18
45
46
47
48
49
50
51
52
53
19
20
23
21
22
24
25
26
27
28
29
30
31
32
33
34
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
FREQ_OUT
GPCTR0_OUT
PFI9/GPCTR0_GATE
DGND
PFI6/WFTRIG
PFI5/UPDATE*
DGND
+5 V
DGND
PFI1/TRIG2
PFI0/TRIG1
DGND
DGND
+5 V
DGND
DIO6
DIO1
DGND
DIO4
EXTREF
1
DAC1OUT
DAC0OUT
ACH15
AIGND
ACH6
ACH13
AIGND
ACH4
AIGND
ACH3
ACH10
AIGND
ACH1
ACH8
DGND
PFI8/GPCTR0_SOURCE
PFI7/STARTSCAN
GPCTR1_OUT
PFI4/GPCTR1_GATE
PFI3/GPCTR1_SOURCE
PFI2/CONVERT*
DGND
DGND
DGND
EXTSTROBE*
SCANCLK
DIO3
DIO7
DIO2
DGND
DIO5
DIO0
DGND
AOGND
AOGND
AIGND
ACH7
ACH14
AIGND
ACH5
ACH12
AISENSE
ACH11
AIGND
ACH2
ACH9
AIGND
ACH0
1
Not available on PCI-MIO-16XE-10 or PCI-MIO-16XE-50