Index
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National Instruments Corporation
I -9
PCI-MIO E Series User Manual
S
SCANCLK signal
description (table), 4-3
I/O signal summary (table)
PCI-MIO-16E-1 and
PCI-MIO-16E-4, 4-6
PCI-MIO-16XE-10, 4-8
PCI-MIO-16XE-50, 4-10
timing connections, 4-28
settling time, 3-9 to 3-10
signal connections
analog input, 4-11 to 4-12
analog output, 4-22 to 4-23
digital I/O, 4-23 to 4-24
field wiring considerations, 4-48
input configurations, 4-13 to 4-21
common-mode signal rejection, 4-21
differential connections
DIFF input configuration, 4-15
floating signal sources, 4-17 to
4-18
ground-referenced signal
sources, 4-16
nonreferenced signal sources,
4-17 to 4-18
recommended configuration (figure),
4-14
single-ended connections, 4-18 to
4-21
floating signal sources (RSE
configuration), 4-20
grounded signal sources (NRSE
configuration), 4-20 to 4-21
I/O connector, 4-1 to 4-10
exceeding maximum ratings
(warning), 4-1
I/O signal summary (table)
PCI-MIO-16E-1 and
PCI-MIO-16E-4, 4-6 to 4-7
PCI-MIO-16XE-10, 4-7 to 4-9
PCI-MIO-16XE-50, 4-9 to 4-10
pin assignments (figure), 4-2
signal descriptions (table), 4-3 to 4-5
optional cable connector
50-pin MIO connector pin
assignments (figure), B-3
68-pin MIO connector pin
assignments (figure), B-2
power connections, 4-25
timing connections, 4-25 to 4-47
DAQ timing connections, 4-27 to
4-37
AIGATE signal, 4-36
CONVERT* signal, 4-34 to
4-35
EXTSTROBE* signal, 4-29
SCANCLK signal, 4-28
SISOURCE signal, 4-36 to 4-37
STARTSCAN signal, 4-32 to
4-34
TRIG1 signal, 4-29 to 4-30
TRIG2 signal, 4-31 to 4-32
typical posttriggered acquisition
(figure), 4-27
typical pretriggered acquisition
(figure), 4-28
general-purpose timing signal
connections, 4-40 to 4-47
FREQ_OUT signal, 4-47
GPCTR0_GATE signal, 4-42
GPCTR0_OUT signal, 4-42 to
4-43
GPCTR0_SOURCE signal, 4-41
GPCTR0_UP_DOWN signal,
4-43
GPCTR1_GATE signal, 4-44 to
4-45
GPCTR1_OUT signal, 4-45
GPCTR1_SOURCE signal, 4-43
to 4-44