FR, MB91460, FR Clocks
Document No. 002-05317 Rev. *C
2
Figure 1. Block Diagram of Clock Circuitry
2.2
RC Clock
The RC clock is available on all FR devices. The RC clock CLKRC is the output clock of the internal RC oscillator.
The RC-oscillator is enabled at power on
.
The timeout counter is clocked with CLKRC.
The typical value of these clocks is 2 MHz and 100 kHz, respectively.
2.3
Main Clock
The Main Clock is available on all FX devices. Main clock / 2 is the default clock selected after power on.
The allowed input frequency is limited to the range 3.5 MHz to 16 MHz when an oscillation circuit is used. The range
is from 3.5 MHz to 4 MHz when an external clock signal is supplied. With respect to EMI considerations, a frequency
of 4 MHz is recommended.
2.4
PLL Clock
The PLL Clock is available on all FR devices and is based on the Main Clock. By default, it is disabled. Before
enabling it, it must be configured.
The PLL Clock also feeds the Clock Modulator. The Clock Modulator is discussed in subsequent sections.
